Patents by Inventor Chad Parsons

Chad Parsons has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12315589
    Abstract: The disclosure provides improvements for transmitting data between different voltage domains of an IC, such as a chip. The disclosure introduces a data transfer circuit that uses a multi-voltage RAM, referred to herein as MVRAM, for transmitting data across the different voltage domains. The MVRAM has multiple memory cells with write ports and read ports on different clock and voltage domains. Accordingly, a write operation can occur completely on the write domain voltage and the read operation can occur completely on the read domain voltage. In one example, the data transfer circuit includes: (1) write logic operating at a first operating voltage, (2) read logic operating at second operating voltage, and (3) a MVRAM with write ports that operate under the first operating voltage and read ports that operate under the second operating voltage.
    Type: Grant
    Filed: March 1, 2023
    Date of Patent: May 27, 2025
    Assignee: NVIDIA Corporation
    Inventors: Jason Golbus, Chad Parsons, Kirk Twardowski, Lalit Gupta, Jesse Wang, Ka Yun Lee, Amy Chen, Ramya Challa, Karan Gupta
  • Publication number: 20240296875
    Abstract: The disclosure provides improvements for transmitting data between different voltage domains of an IC, such as a chip. The disclosure introduces a data transfer circuit that uses a multi-voltage RAM, referred to herein as MVRAM, for transmitting data across the different voltage domains. The MVRAM has multiple memory cells with write ports and read ports on different clock and voltage domains. Accordingly, a write operation can occur completely on the write domain voltage and the read operation can occur completely on the read domain voltage. In one example, the data transfer circuit includes: (1) write logic operating at a first operating voltage, (2) read logic operating at second operating voltage, and (3) a MVRAM with write ports that operate under the first operating voltage and read ports that operate under the second operating voltage.
    Type: Application
    Filed: March 1, 2023
    Publication date: September 5, 2024
    Inventors: Jason Golbus, Chad Parsons, Kirk Twardowski, Lalit Gupta, Jesse Wang, Ka Yun Lee, Amy Chen, Ramya Challa, Karan Gupta