Abstract: A gas distribution plate for a showerhead assembly of a processing chamber may include at least a first plate and second plate. The first plate may include a first plurality holes each having a diameter of at least about 100 um. The second plate may include a second plurality of holes each having a diameter of at least about 100 um. Further, each of the first plurality of holes is aligned with a respective one of the second plurality of holes forming a plurality of interconnected holes. Each of the interconnected holes is isolated from each other interconnected holes.

Abstract: A gas distribution plate for a showerhead assembly of a processing chamber may include at least a first plate and second plate. The first plate may include a first plurality holes each having a diameter of at least about 100 um. The second plate may include a second plurality of holes each having a diameter of at least about 100 um. Further, each of the first plurality of holes is aligned with a respective one of the second plurality of holes forming a plurality of interconnected holes. Each of the interconnected holes is isolated from each other interconnected holes.

Abstract: A showerhead assembly includes a support structure and a porous plate. The support structure includes a support feature. The porous plate has a thermal conductivity of at least about 50 W/(mK) and includes a plurality of pores having an average diameter of less than about 100 um, wherein at least a portion of a perimeter of the porous plate rests on the support feature. The showerhead may be included within a processing chamber that is utilized to process a substrate.

Abstract: A gas distribution plate for a showerhead assembly of a processing chamber may include at least a first plate and second plate. The first plate may include a first plurality holes each having a diameter of at least about 100 um. The second plate may include a second plurality of holes each having a diameter of at least about 100 um. Further, each of the first plurality of holes is aligned with a respective one of the second plurality of holes forming a plurality of interconnected holes. Each of the interconnected holes is isolated from each other interconnected holes.

Abstract: A showerhead assembly includes a support structure and a porous plate. The support structure includes a support feature. The porous plate has a thermal conductivity of at least about 50 W/(mK) and includes a plurality of pores having an average diameter of less than about 100 um, wherein at least a portion of a perimeter of the porous plate rests on the support feature. The showerhead may be included within a processing chamber that is utilized to process a substrate.

Abstract: Methods for forming silicon nitride hard masks are provided. The silicon nitride hard masks include carbon-doped silicon nitride layers and undoped silicon nitride layers. Carbon-doped silicon nitride layers that are deposited from a mixture comprising a carbon source compound, a silicon source compound, and a nitrogen source in the presence of RF power are provided. Also provided are methods of UV post-treating silicon nitride layers to provide silicon nitride hard masks. The carbon-doped silicon nitride layers and UV post-treated silicon nitride layers have desirable wet etch rates and dry etch rates for hard mask layers.

Abstract: Methods are provided for processing a substrate comprising a bilayer barrier film thereon. In one aspect, a method comprises depositing a first barrier layer, depositing a second barrier layer on the first barrier layer, depositing a dielectric layer on the bilayer barrier film formed by the first barrier layer and the second barrier layer, and ultraviolet curing the dielectric layer. In another aspect, a method comprises depositing a first barrier layer, depositing a second barrier layer on the first barrier layer, depositing a dielectric layer on the bilayer barrier film formed by the first barrier layer and the second barrier layer, and curing the dielectric layer with an electron beam treatment.

Abstract: Methods for forming silicon nitride hard masks are provided. The silicon nitride hard masks include carbon-doped silicon nitride layers and undoped silicon nitride layers. Carbon-doped silicon nitride layers that are deposited from a mixture comprising a carbon source compound, a silicon source compound, and a nitrogen source in the presence of RF power are provided. Also provided are methods of UV post-treating silicon nitride layers to provide silicon nitride hard masks. The carbon-doped silicon nitride layers and UV post-treated silicon nitride layers have desirable wet etch rates and dry etch rates for hard mask layers.

Abstract: Methods for forming silicon nitride hard masks are provided. The silicon nitride hard masks include carbon-doped silicon nitride layers and undoped silicon nitride layers. Carbon-doped silicon nitride layers that are deposited from a mixture comprising a carbon source compound, a silicon source compound, and a nitrogen source in the presence of RF power are provided. Also provided are methods of UV post-treating silicon nitride layers to provide silicon nitride hard masks. The carbon-doped silicon nitride layers and UV post-treated silicon nitride layers have desirable wet etch rates and dry etch rates for hard mask layers.

Abstract: Methods for forming silicon nitride hard masks are provided. The silicon nitride hard masks include carbon-doped silicon nitride layers and undoped silicon nitride layers. Carbon-doped silicon nitride layers that are deposited from a mixture comprising a carbon source compound, a silicon source compound, and a nitrogen source in the presence of RF power are provided. Also provided are methods of UV post-treating silicon nitride layers to provide silicon nitride hard masks. The carbon-doped silicon nitride layers and UV post-treated silicon nitride layers have desirable wet etch rates and dry etch rates for hard mask layers.

Abstract: Methods are provided for processing a substrate comprising a bilayer barrier film thereon. In one aspect, a method comprises depositing a first barrier layer, depositing a second barrier layer on the first barrier layer, depositing a dielectric layer on the bilayer barrier film formed by the first barrier layer and the second barrier layer, and ultraviolet curing the dielectric layer. In another aspect, a method comprises depositing a first barrier layer, depositing a second barrier layer on the first barrier layer, depositing a dielectric layer on the bilayer barrier film formed by the first barrier layer and the second barrier layer, and curing the dielectric layer with an electron beam treatment.

Abstract: A method of forming source and drain regions in a semiconductor transistor. The method includes the steps of forming a first sidewall spacer on sidewall surfaces of a gate electrode that is formed on an underlying substrate, where the first sidewall spacer includes amorphous carbon. The method may also include implanting the source and drain regions in the semiconductor substrate, and removing the first sidewall spacer before annealing the source and drain regions. The method may still further include forming a second sidewall spacer on the sidewall surfaces of the gate electrode, where the second sidewall spacer has a k-value less than 4. Also, a method to enhance conformality of a sidewall spacer layer. The method may include the steps of pulsing a radio-frequency power source to generate periodically a plasma, and depositing the plasma on sidewall surfaces of a gate electrode to form the sidewall spacer layer.

Abstract: A method for seasoning a deposition chamber wherein the chamber components and walls are densely coated with a material that does not contain carbon prior to deposition of an organo-silicon material on a substrate. An optional carbon-containing layer may be deposited therebetween. A chamber cleaning method using low energy plasma and low pressure to remove residue from internal chamber surfaces is provided and may be combined with the seasoning process.

Abstract: A method is provided for forming a fluorinated silicate glass layer with HDP-CVD having a lower dielectric constant without compromising the mechanical properties of hardness and compressive stress. A gaseous mixture comprising a silicon-containing gas, an oxygen-containing gas, and a fluorine-containing gas is provided to a process chamber. The ratio of the flow rate of the fluorine-containing gas to the flow rate of the silicon-containing gas is greater than 0.65. A high-density plasma is generated from the gaseous mixture by applying a source RF power having a power density less than 12 W/cm2. A bias is applied to a substrate in the process chamber at a bias power density greater than 0.8 W/cm2 and less than 2.4 W/cm2. The fluorinated silicate glass layer is deposited onto the substrate using the high-density plasma.

Abstract: A method is provided for forming a fluorinated silicate glass layer with HDP-CVD having a lower dielectric constant without compromising the mechanical properties of hardness and compressive stress. A gaseous mixture comprising a silicon-containing gas, an oxygen-containing gas, and a fluorine-containing gas is provided to a process chamber. The ratio of the flow rate of the fluorine-containing gas to the flow rate of the silicon-containing gas is greater than 0.65. A high-density plasma is generated from the gaseous mixture by applying a source RF power having a power density less than 12 W/cm2. A bias is applied to a substrate in the process chamber at a bias power density greater than 0.8 W/cm2 and less than 2.4 W/cm2. The fluorinated silicate glass layer is deposited onto the substrate using the high-density plasma.