Patents by Inventor Chae Gon Oh

Chae Gon Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5995165
    Abstract: In a color correction apparatus for a color display device using 2-dimensional (2-D) chromaticity partitioning, a chromaticity plane is unevenly partitioned such that partitioned areas adjacent to each vertex of the chromaticity plane have larger areas. An area determining unit projects an input 3-D color signal onto the 2-D chromaticity plane, and outputs an index representing the location of the input color signal in the 2-D chromaticity plane. A first memory stores index values of the unevenly partitioned areas of the chromaticity plane, and outputs an index value corresponding to the index. A second memory stores transform coefficients of a matrix defining an input-output relationship of the color signal and outputs a predetermined number of transform coefficients stored in an address designated by the index value output by the first memory.
    Type: Grant
    Filed: May 6, 1997
    Date of Patent: November 30, 1999
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Chae-gon Oh
  • Patent number: 5860077
    Abstract: A three-dimensional data storing method for storing three-dimensional (3-D) data on cubical vertices belonging to a cube, the method includes the steps of: index-numbering each vertex of the three-dimensional data so that cubical vertices on the surface belonging commonly to two neighboring cubes have the same index number; classifying the 3-D data according to each index number; and storing the classified 3-D data in a plurality of memories corresponding to each index number, whereby the three-dimensional data can be accessed in parallel.
    Type: Grant
    Filed: December 10, 1996
    Date of Patent: January 12, 1999
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-goo Kim, Chae-gon Oh
  • Patent number: 5790210
    Abstract: Among the total sampling points for digital convergence, a portion are selected as seed points. Correction data of each of the selected seed points is efficiently stored in a first memory. The correction data of the sampling points which are not stored is interpolated using operation values. The operation values for the interpolation operation are stored ahead of time in a look-up table. Thus, rather than using dedicated calculating circuits for performing an interpolation operation, hardware is simplified and operation speed is enhanced.
    Type: Grant
    Filed: March 22, 1996
    Date of Patent: August 4, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-goo Kim, Chae-gon Oh
  • Patent number: 5694181
    Abstract: A digital convergence correcting circuit for digitally correcting a convergence of R, G and B, which includes a memory for storing only seed data and a convergence correcting part for interpolating and latching the stored seed data with 16 points of sampling data by using a predetermined equation and then interpolating the latched sampling data in a vertical direction with as many horizontal lines as are necessary according to the particular broadcasting system. Since only seed data is stored at the memory, the size of the memory is minimized.
    Type: Grant
    Filed: December 23, 1993
    Date of Patent: December 2, 1997
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Chae Gon Oh