Abstract: A lighting apparatus includes a light emitting diode, in which the light emitting diode includes an n-type nitride semiconductor layer, an active layer located on the n-type nitride semiconductor layer, and a p-type nitride semiconductor layer located on the active layer. The light emitting diode emits light that varies from yellow light to white light depending on a driving current.

Abstract: The embodiments of the present invention relate to a thermoelectric element and a thermoelectric module used for cooling, and the thermoelectric module can be made thin by having a first substrate and a second substrate with different surface areas to raise the heat-dissipation effectiveness.

Abstract: The embodiments of the present invention relate to a thermoelectric element and a thermoelectric module used for cooling, and the thermoelectric module can be made thin by having a first substrate and a second substrate with different surface areas to raise the heat-dissipation effectiveness.

Abstract: The embodiments of the present invention relate to a thermoelectric element and a thermoelectric module used for cooling, and the thermoelectric module can be made thin by having a first substrate and a second substrate with different surface areas to raise the heat-dissipation effectiveness.

Abstract: A page buffer includes a first precharge circuit, a second precharge circuit, and a sense amplifying circuit. The first precharge circuit includes a first path for precharging a bitline connected to a nonvolatile memory cell. The second precharge circuit includes a second path for precharging a sensing node connected to the bitline. The second path is electrically separated from the first path. The sensing node is used to detect a state of the nonvolatile memory cell. The sense amplifying circuit is connected to the sensing node and the second precharge circuit, and stores state information representing the state of the nonvolatile memory cell. The second precharge circuit is configured to perform a first precharge operation for the sensing node and configured to selectively perform a second precharge operation for the sensing node based on the state of the nonvolatile memory cell after the first precharge operation.

Abstract: A page buffer includes a first precharge circuit, a second precharge circuit, and a sense amplifying circuit. The first precharge circuit includes a first path for precharging a bitline connected to a nonvolatile memory cell. The second precharge circuit includes a second path for precharging a sensing node connected to the bitline. The second path is electrically separated from the first path. The sensing node is used to detect a state of the nonvolatile memory cell. The sense amplifying circuit is connected to the sensing node and the second precharge circuit, and stores state information representing the state of the nonvolatile memory cell. The second precharge circuit is configured to perform a first precharge operation for the sensing node and configured to selectively perform a second precharge operation for the sensing node based on the state of the nonvolatile memory cell after the first precharge operation.

Abstract: The embodiments of the present invention relate to a thermoelectric element and a thermoelectric module used for cooling, and the thermoelectric module can be made thin by having a first substrate and a second substrate with different surface areas to raise the heat-dissipation effectiveness.

Abstract: The embodiments of the present invention relate to a thermoelectric element and a thermoelectric module used for cooling, and the thermoelectric module can be made thin by having a first substrate and a second substrate with different surface areas to raise the heat-dissipation effectiveness.

Abstract: The embodiments of the present invention relate to a thermoelectric element and a thermoelectric module, and may provide a thermoelectric element and a thermoelectric module having notably improved cooling capacity (Qc) and rate of temperature change (AT) to be provided by constructing the thermoelectric element by stacking unit members, each of which comprises a semiconductor layer on a substrate, thereby lowering thermal conductivity and raising electric conductivity.

Abstract: The embodiments of the present invention relate to a thermoelectric element and a thermoelectric module used for cooling, and the thermoelectric module can be made thin by having a first substrate and a second substrate with different surface areas to raise the heat-dissipation effectiveness.

Abstract: Provided is a heat conversion device, including: a unit thermoelectric module including a first semiconductor element and a second semiconductor element; and a heat conversion module performing heat conversion by coming into contact with the unit thermoelectric module, wherein the heat conversion module includes: a heat conversion substrate coming into direct contact with at least any one of one end and the other end of the first semiconductor element or the second semiconductor element; and a radiating unit disposed on the heat conversion substrate.

Abstract: A nonvolatile memory device includes a memory array having multiple nonvolatile memory cells, a first read circuit and a second read circuit. The first read circuit is configured to read first data from the memory array during a first read operation and to provide one or more protection signals indicating a victim period during the first read operation. The second read circuit is configured to read second data from the memory array during a second read operation and to provide one or more check signals indicating an aggressor period during the second read operation.

Abstract: A nonvolatile memory device includes a memory array having multiple nonvolatile memory cells, a first read circuit and a second read circuit. The first read circuit is configured to read first data from the memory array during a first read operation and to provide one or more protection signals indicating a victim period during the first read operation. The second read circuit is configured to read second data from the memory array during a second read operation and to provide one or more check signals indicating an aggressor period during the second read operation.

Abstract: A flash memory device using an error correction code (ECC) algorithm and a method of operating the same. The device includes a memory cell array including a error correction code (ECC) block including data memory cells configured to store data and a parity cell configured to store a first parity code, a parity controller configured to generate a second parity code based on a the current operating mode of the flash memory device, and an error correction unit configured to receive one of the first and second parity codes and to perform an ECC algorithm on the data stored in the data memory cells using the received parity code. A control logic restarts an erase operation on an erroneously unerased data memory cell or prevents the erase operation from being restarted based on the number of erroneous bits per ECC block.

Abstract: In a voltage output circuit of a nonvolatile semiconductor memory device, a high voltage generator generates an internal high voltage, a sampling signal generator generates a sampling signal, and a sample and old circuit samples and holds the internal high voltage in accordance with the sampling signal.

Abstract: A method and apparatus for trimming a reference cell in a semiconductor memory device are provided. The method includes generating an internal bias current capable of being trimmed, and trimming the reference cell based on the internal bias current. The semiconductor memory device includes a reference cell in which a reference cell current flows between a drain and a source based on a bias voltage, an internal bias current generator configured to generate an internal bias current capable of being trimmed, and a trimming circuit configured to trim the reference cell based on the internal bias current.

Abstract: A flash memory device using an error correction code (ECC) algorithm and a method of operating the same. The device includes a memory cell array including a error correction code (ECC) block including data memory cells configured to store data and a parity cell configured to store a first parity code, a parity controller configured to generate a second parity code based on a the current operating mode of the flash memory device, and an error correction unit configured to receive one of the first and second parity codes and to perform an ECC algorithm on the data stored in the data memory cells using the received parity code. A control logic restarts an erase operation on an erroneously unerased data memory cell or prevents the erase operation from being restarted based on the number of erroneous bits per ECC block.

Abstract: In a voltage output circuit of a nonvolatile semiconductor memory device, a high voltage generator generates an internal high voltage, a sampling signal generator generates a sampling signal, and a sample and old circuit samples and holds the internal high voltage in accordance with the sampling signal.

Abstract: A method and apparatus for trimming a reference cell in a semiconductor memory device are provided. The method includes generating an internal bias current capable of being trimmed, and trimming the reference cell based on the internal bias current. The semiconductor memory device includes a reference cell in which a reference cell current flows between a drain and a source based on a bias voltage, an internal bias current generator configured to generate an internal bias current capable of being trimmed, and a trimming circuit configured to trim the reference cell based on the internal bias current.