Abstract: An electronic apparatus for performing machine learning a method of machine learning, and a non-transitory computer-readable recording medium are provided. The electronic apparatus includes an operation module configured to include a plurality of processing elements arranged in a predetermined pattern and share data between the plurality of processing elements which are adjacent to each other to perform an operation; and a processor configured to control the operation module to perform a convolution operation by applying a filter to input data, wherein the processor controls the operation module to perform the convolution operation by inputting each of a plurality of elements configuring a two-dimensional filter to the plurality of processing elements in a predetermined order and sequentially applying the plurality of elements to the input data.

Abstract: An operating method of a computing processor includes: performing a computing operation on a data unit assigned from among a plurality of data units that are partitioned from multi-media data; obtaining operation completion information of the computing operation performed on the data unit from among the plurality of data units, from at least one predetermined computing processor from among a plurality of computing processors; storing the operation completion information obtained from the at least one predetermined computing processor; and determining whether computing operations performed on the multi-media data have been completed, based on the operation completion information obtained from the at least one predetermined computing processor and stored, and the computing operation performed on the assigned data unit.

Abstract: A computing system is disclosed. The computing system according to one embodiment of the present disclosure comprises: a memory device for storing an application program; a processor for executing a loader for loading data of the application program into a memory space allocated for execution of the application program; a local memory having a width corresponding to the size of a register of the processor; and a constant memory having a width smaller than that of the local memory, wherein, according to the size of constant data included in the application program, the processor loads the constant data into one of the local memory and the constant memory.

Abstract: An operating method of a computing processor includes: performing a computing operation on a data unit assigned from among a plurality of data units that are partitioned from multi-media data; obtaining operation completion information of the computing operation performed on the data unit from among the plurality of data units, from at least one predetermined computing processor from among a plurality of computing processors; storing the operation completion information obtained from the at least one predetermined computing processor; and determining whether computing operations performed on the multi-media data have been completed, based on the operation completion information obtained from the at least one predetermined computing processor and stored, and the computing operation performed on the assigned data unit.

Abstract: A processor and a control method thereof are processed. The processor includes an instruction fetch module configured to receive a first instruction of an interrupt service routine without backup of data stored in a register in response to processing of the interrupt service routine being requested, a detecting module configured to analyze the received first instruction to determine whether the data stored in the register needs to be changed, an instruction generating module configured to generate a second instruction for storing data in a temporary memory when the stored data is initially changed, an instruction selecting module configured to sequentially select the generated second instruction and first instruction; and a control module configured to perform the second instruction and the first instruction.

Abstract: A computing system is disclosed. The computing system according to one embodiment of the present disclosure comprises: a memory device for storing an application program; a processor for executing a loader for loading data of the application program into a memory space allocated for execution of the application program; a local memory having a width corresponding to the size of a register of the processor; and a constant memory having a width smaller than that of the local memory, wherein, according to the size of constant data included in the application program, the processor loads the constant data into one of the local memory and the constant memory.

Abstract: An electronic apparatus for performing machine learning a method of machine learning, and a non-transitory computer-readable recording medium are provided. The electronic apparatus includes an operation module configured to include a plurality of processing elements arranged in a predetermined pattern and share data between the plurality of processing elements which are adjacent to each other to perform an operation; and a processor configured to control the operation module to perform a convolution operation by applying a filter to input data, wherein the processor controls the operation module to perform the convolution operation by inputting each of a plurality of elements configuring a two-dimensional filter to the plurality of processing elements in a predetermined order and sequentially applying the plurality of elements to the input data.

Abstract: A processing apparatus for managing power based on data is provided. The processing apparatus may obtain, in response to an access request from a processor for particular data stored in a memory, existing power information having a predefined correspondence to the particular data, and control a power mode of the processor based on the existing power information.

Abstract: A memory overlay apparatus includes an internal memory that includes a dirty bit indicating a changed memory area, a memory management unit that controls an external memory to store only changed data so that only data actually being used by a task during overlay is stored and restored, and a direct memory access (DMA) management unit that confirms the dirty bit when the task is changed and that moves a data area of the task between the internal memory and the external memory.

Abstract: A processor and a control method thereof are processed. The processor includes an instruction fetch module configured to receive a first instruction of an interrupt service routine without backup of data stored in a register in response to processing of the interrupt service routine being requested, a detecting module configured to analyze the received first instruction to determine whether the data stored in the register needs to be changed, an instruction generating module configured to generate a second instruction for storing data in a temporary memory when the stored data is initially changed, an instruction selecting module configured to sequentially select the generated second instruction and first instruction; and a control module configured to perform the second instruction and the first instruction.

Abstract: A method of generating a code for a remote procedure call (RPC) includes obtaining a source code including information indicating a part where the RPC is to be performed, and generating a code for calling the RPC and a code for executing an RPC procedure, by analyzing the source code including information indicating the part where the RPC is to be performed.

Abstract: Provided is an apparatus and method for managing power based on data. The apparatus may include a code segment searching unit configured to search for at least one code segment in which a power type is inserted, a block determining unit configured to determine at least one block based on the at least one found code segment, and a power mode control unit configured to control the at least one determined block to operate in a power mode corresponding to the power type.

Abstract: A modulo scheduling method including calculating at least two candidate initiation intervals between adjacent iterations, searching for schedules of the instructions in parallel by using the candidate initiation intervals, and selecting a schedule determined to be valid from among the searched schedules.

Abstract: A method of generating a code for a remote procedure call (RPC) includes obtaining a source code including information indicating a part where the RPC is to be performed, and generating a code for calling the RPC and a code for executing an RPC procedure, by analyzing the source code including information indicating the part where the RPC is to be performed.

Abstract: An apparatus and method for dynamically reconfiguring an Operating System (OS) for a manycore system are provided. The apparatus may include an application type determining unit to determine a type of an executed application, and an OS reconfiguring unit to activate only at least one function in an OS, based on the determined type of the application, and to reconfigure the OS.

Abstract: Disclosed is a scratch pad memory management device and a method thereof. The scratch pad memory management device divides a scratch pad memory into a plurality of unit blocks, maintains a memory allocation table corresponding to indices of the plurality of unit blocks in a main memory, and manages the scratch pad memory.

Abstract: An apparatus for performing partition scheduling in a manycore environment. The apparatus may perform partition scheduling based on a priority and in this instance, may perform partition scheduling to minimize the number of idle cores. The apparatus may include a partition queue to manage a partition scheduling event; a partition scheduler including a core map to store hardware information of each of the plurality of cores; and a partition manager to perform partition scheduling with respect to the plurality of cores in response to the partition scheduling event, using the hardware information.

Abstract: Memory mapping in small units using a segment and subsegments is described, and thus it is possible to control a memory access even using a small amount of hardware, and it is possible to reduce costs incurred by hardware. Additionally, it is possible to prevent a memory from being destroyed due to a task error in the multi-processor system.

Abstract: A method of measuring software performance includes inserting a performance measurement code into a source code, stalling a target system, on which the code is executed by a processor, and a performance counter based on the performance measurement code, transmitting performance data corresponding to a stalled time point when the target system and the performance counter are stalled to a host system configured to store the performance data corresponding to the stalled time point, and resuming execution of the source code by the target system and of the performance counter while the performance data is transmitted and stored.

Abstract: Disclosed are a system, method and computer-readable medium related to processing debug information from an embedded system. Source code of an application program to be used in an embedded system may be compiled by a computing system. The application program may include a debug code line. A minimum amount of debug information is stored in an embedded system, reducing memory overhead and waste of clock cycles of a processor.