Abstract: A display device includes a display panel including pixels in one pixel column and a gate driver for sequentially providing scan signals to the pixels. Each of the pixels includes a light emitting element, a first transistor for controlling a current amount of driving current flowing through the light emitting element and a second transistor for transferring a data signal to a gate electrode of the first transistor in response to a corresponding scan signal among the scan signals. A first pixel among the pixels is electrically connected to a first data line, and a second pixel adjacent to the first pixel among the pixels is electrically connected to a second data line different from the first data line. A second scan signal provided to the second pixel partially overlaps with a first scan signal provided to the first pixel.

Abstract: A display device includes a scan line extending in a first direction. A plurality of data lines cross the scan line. A driving voltage line crosses the scan line. An active pattern includes a plurality of channel regions and a plurality of conductive regions. A control line is connected to the plurality of data lines and the driving voltage line. The active pattern includes a shielding part overlapping at least one data line of the plurality of data lines. The control line includes a plurality of main line parts each extending in the first direction, and a detour part connecting two adjacent main line parts of the plurality of main line parts to each other. The detour part extends along a periphery of the active pattern and crosses the at least one data line of the plurality of data lines.

Abstract: Provided is a light emitting display device comprising a driving transistor; a second transistor; a light emitting diode; a storage capacitor; a first scan line; and a driving gate electrode, in which a pixel includes only a transistor including an oxide semiconductor. The light emitting display device prevents deterioration of display quality due to a boost capacitor with a scan line in a pixel using an n-type transistor including an oxide semiconductor. Further, the light emitting display device prevents deterioration of display quality due to coupling with a data line in a pixel using an n-type transistor.

Abstract: A display device includes a scan line extending in a first direction. A plurality of data lines cross the scan line. A driving voltage line crosses the scan line. An active pattern includes a plurality of channel regions and a plurality of conductive regions. A control line is connected to the plurality of data lines and the driving voltage line. The active pattern includes a shielding part overlapping at least one data line of the plurality of data lines. The control line includes a plurality of main line parts each extending in the first direction, and a detour part connecting two adjacent main line parts of the plurality of main line parts to each other. The detour part extends along a periphery of the active pattern and crosses the at least one data line of the plurality of data lines.

Abstract: A light-emitting display device includes first and second sub pixels each of which includes a driving transistor including first and second electrodes and a gate electrode, and being configured to control an electric current flowing from the first electrode to the second electrode according to a data voltage applied to a gate electrode, a light-emitting element connected to the second electrode, and a first capacitor disposed between a first sub supply voltage line to which a first supply voltage is applied and the second electrode. The first sub supply voltage line is disposed to overlap the second electrode. A capacitance of a first capacitor of the first sub pixel versus a capacitance of a first capacitor of the second sub pixel is selectively determined to correspond to an amount of the overlap between the first sub supply voltage line and the second electrode.

Abstract: A display device comprises a substrate, a first channel above the substrate, a first gate electrode overlapping the first channel, a storage electrode above the first gate electrode, a first connection electrode above the storage electrode, and connected with the first gate electrode, a third channel of a third transistor above the substrate, and a second scan line including a third gate electrode overlapping the third channel, wherein the third transistor includes a second electrode connected with the first connection electrode, and wherein the second scan line includes a first portion including the third gate electrode, and extending in a first direction, a second portion bent from the first portion, and extending in a second direction in parallel with a first side of the storage electrode, and a third portion bent from the second portion, and extending in the first direction in parallel with a second side of the storage electrode.

Abstract: An organic light emitting diode (“OLED”) display includes a semiconductor layer on a substrate, first and second signal lines on the semiconductor layer, a shield layer on the first and second signal lines, a data line on the shield layer, and an OLED on the data line, where the transistor includes a driving transistor, a second transistor connected to the first signal line and the data line, and a third transistor including a gate electrode connected to the first signal line, a third electrode connected to a second electrode of the driving transistor, and a fourth electrode connected to a gate electrode of the driving transistor, the shield layer includes an overlapped portion overlapping at least a part of the connection portion and non-overlaps the second transistor, and the shield layer is separated from the first and second signal lines with a gap therebetween in a plan view.

Abstract: An organic light emitting diode (“OLED”) display includes a semiconductor layer on a substrate, first and second signal lines on the semiconductor layer, a shield layer on the first and second signal lines, a data line on the shield layer, and an OLED on the data line, where the transistor includes a driving transistor, a second transistor connected to the first signal line and the data line, and a third transistor including a gate electrode connected to the first signal line, a third electrode connected to a second electrode of the driving transistor, and a fourth electrode connected to a gate electrode of the driving transistor, the shield layer includes an overlapped portion overlapping at least a part of the connection portion and non-overlaps the second transistor, and the shield layer is separated from the first and second signal lines with a gap therebetween in a plan view.

Abstract: Systems and methods are provided for a display device that includes a display unit. The display unit includes scan lines and pixels coupled to the scan lines. A timing controller operates in a first mode and a second mode and generates a start signal, based on a vertical synchronization signal provided from the outside. A scan driver generates a scan signal, based on the start signal, and sequentially provides the scan signal to the scan lines. The timing controller generates the start signal immediately after a pulse of the vertical synchronization signal is applied in the first mode, and generates the start signal before a pulse the vertical synchronization signal is applied in the second mode.

Abstract: A stage circuit includes a first substage circuit unit connected to first through third input terminals receiving a start signal, a first clock signal, and a second clock signal, respectively. The first substage circuit unit generates first and second operation signals based on the start signal and the first and second clock signals, and supplies a first scan signal to a first output terminal based on the first and second operation signals. The stage circuit further includes a second substage circuit unit connected to the third input terminal and a fourth input terminal receiving a third clock signal. The second substage circuit unit supplies a second scan signal to a second output terminal based on the first and second operation signals, the second clock signal, and the third clock signal. The first and second scan signals include a pulse of a low voltage level and a high voltage level, respectively.

Abstract: A display device includes a scan line extending in a first direction. A plurality of data lines cross the scan line. A driving voltage line crosses the scan line. An active pattern includes a plurality of channel regions and a plurality of conductive regions. A control line is connected to the plurality of data lines and the driving voltage line. The active pattern includes a shielding part overlapping at least one data line of the plurality of data lines. The control line includes a plurality of main line parts each extending in the first direction, and a detour part connecting two adjacent main line parts of the plurality of main line parts to each other. The detour part extends along a periphery of the active pattern and crosses the at least one data line of the plurality of data lines.

Abstract: A light-emitting display device includes first and second sub pixels each of which includes a driving transistor including first and second electrodes and a gate electrode, and being configured to control an electric current flowing from the first electrode to the second electrode according to a data voltage applied to a gate electrode, a light-emitting element connected to the second electrode, and a first capacitor disposed between a first sub supply voltage line to which a first supply voltage is applied and the second electrode. The first sub supply voltage line is disposed to overlap the second electrode. A capacitance of a first capacitor of the first sub pixel versus a capacitance of a first capacitor of the second sub pixel is selectively determined to correspond to an amount of the overlap between the first sub supply voltage line and the second electrode.

Abstract: A display device includes a scan line extending in a first direction. A plurality of data lines cross the scan line. A driving voltage line crosses the scan line. An active pattern includes a plurality of channel regions and a plurality of conductive regions. A control line is connected to the plurality of data lines and the driving voltage line. The active pattern includes a shielding part overlapping at least one data line of the plurality of data lines. The control line includes a plurality of main line parts each extending in the first direction, and a detour part connecting two adjacent main line parts of the plurality of main line parts to each other. The detour part extends along a periphery of the active pattern and crosses the at least one data line of the plurality of data lines.

Abstract: A display device, including: pixels coupled to scan lines and data lines; a data driver configured to supply respective data signals to the data lines, including an amplifier disposed at an output terminal of the data driver, the amplifier including a first power terminal and a second power terminal; a switch unit configured to perform a power switching operation of alternately connecting the first power terminal and the second power terminal of the amplifier to a first driving power source and a second driving power source; and a driving controller configured to control the data driver and the switch unit, wherein the driving controller is configured to output a switch control signal to control the switch unit and interrupt the power switching operation during a blank period between source output periods, during which the data driver is configured to output the data signals of each frame.

Abstract: An organic light emitting diode (“OLED”) display includes a semiconductor layer on a substrate, first and second signal lines on the semiconductor layer, a shield layer on the first and second signal lines, a data line on the shield layer, and an OLED on the data line, where the transistor includes a driving transistor, a second transistor connected to the first signal line and the data line, and a third transistor including a gate electrode connected to the first signal line, a third electrode connected to a second electrode of the driving transistor, and a fourth electrode connected to a gate electrode of the driving transistor, the shield layer includes an overlapped portion overlapping at least a part of the connection portion and non-overlaps the second transistor, and the shield layer is separated from the first and second signal lines with a gap therebetween in a plan view.

Abstract: A light-emitting display device includes first and second sub pixels each of which includes a driving transistor including first and second electrodes and a gate electrode, and being configured to control an electric current flowing from the first electrode to the second electrode according to a data voltage applied to a gate electrode, a light-emitting element connected to the second electrode, and a first capacitor disposed between a first sub supply voltage line to which a first supply voltage is applied and the second electrode. The first sub supply voltage line is disposed to overlap the second electrode. A capacitance of a first capacitor of the first sub pixel versus a capacitance of a first capacitor of the second sub pixel is selectively determined to correspond to an amount of the overlap between the first sub supply voltage line and the second electrode.

Abstract: A display device includes pixels, a scan driver, an emission driver, and a data driver. A pixel of an i-th horizontal line includes a light emitting element, a first transistor including a first electrode connected to a first node, a second transistor including a gate electrode connected to an (i+x)-th emission control line and connected to one of the data lines, a third transistor including a gate electrode connected to an (i+y)-th emission control line, and connected between the second transistor and the first node, a fourth transistor connected between a third node connected to a second electrode of the first transistor and a second node, and turned on by a scan signal supplied to an i-th scan line, and a fifth transistor connected between the first power and the first node, and turned off by the emission control signal supplied to an i-th emission control line.

Abstract: A stage circuit includes a first substage circuit unit connected to first through third input terminals receiving a start signal, a first clock signal, and a second clock signal, respectively. The first substage circuit unit generates first and second operation signals based on the start signal and the first and second clock signals, and supplies a first scan signal to a first output terminal based on the first and second operation signals. The stage circuit further includes a second substage circuit unit connected to the third input terminal and a fourth input terminal receiving a third clock signal. The second substage circuit unit supplies a second scan signal to a second output terminal based on the first and second operation signals, the second clock signal, and the third clock signal. The first and second scan signals include a pulse of a low voltage level and a high voltage level, respectively.

Abstract: A gate driver includes a stage configured to output a gate signal, the stage including an input part configured to control a voltage of a first node and a voltage of a second node based on signals supplied to a first input terminal and a second input terminal, an output part configured to supply a voltage of a first power source or a voltage of a second power source as the gate signal to an output terminal based on a voltage of a third node and a voltage of a fourth node, a first signal processing part configured to supply the voltage of the second power source to the fourth node based on the voltage of the first node, or to electrically connect the second node and the fourth node through a fifth node based on a signal supplied to a third input terminal, and a second signal processing part including a first transistor connected between the third node and a sixth node to control the voltage of the third node based on an operation of the first transistor.

Abstract: An organic light-emitting diode display is disclosed. In one aspect, the display includes a scan line formed over a substrate, a data line formed over the substrate, and a driving voltage line configured to receive a driving voltage. The data line and driving voltage line cross the scan line and are electrically insulated from the scan line. A switching transistor is electrically connected to the scan line and the data line and includes a switching drain electrode. A driving transistor includes a driving source electrode electrically connected to the switching drain electrode and a driving gate electrode including a first storage electrode. A storage line includes a second storage electrode overlapping the first storage electrode. An OLED is electrically connected to the driving transistor, the second storage electrode including an extension at least partially overlapping the data line.