Patents by Inventor Chaein MOON

Chaein MOON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12701664
    Abstract: A method of manufacturing an electronic device, includes: providing a substrate including a plurality of mounting regions on which electronic components are mounted respectively; forming a plurality of vapor passage holes that penetrate the substrate; disposing the electronic components on the substrate via bumps; heating a first heat transfer fluid to generate a second heat transfer fluid in a vapor state; supplying at least a portion of the second heat transfer fluid in the vapor state through the vapor passage holes of the substrate; and soldering the bumps using the at least the portion of the second heat transfer fluid in the vapor state.
    Type: Grant
    Filed: March 28, 2023
    Date of Patent: August 4, 2026
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Youngja Kim, Donguk Kwon, Youngmin Lee, Byungkeun Kang, Gongmyeong Kim, Chaein Moon
  • Publication number: 20260101756
    Abstract: A semiconductor package includes a substrate including a first layer, a plurality of structures extending in a first direction on the first layer by a first length and including the same materials as the first layer, and a first semiconductor chip bonded to the substrate, wherein a separation distance in the first direction between a first surface of the first semiconductor chip facing the substrate and the substrate is determined by the first length.
    Type: Application
    Filed: August 5, 2025
    Publication date: April 9, 2026
    Inventors: Hyeonrae Cho, Gongmyeong Kim, Chaein Moon, Taejae Park
  • Publication number: 20260026341
    Abstract: Provided is a semiconductor package including a substrate including a body having a first surface and a second surface, the first surface and the second surface opposite to each other, a plurality of interconnection patterns arranged in a vertical direction within the body, the plurality of interconnection patterns including upper terminals on the first surface and lower terminals on the second surface, and an induction heating structure within the body, and the induction heating structure spaced apart from the plurality of interconnection patterns, an upper protective layer on the first surface of the substrate and the upper protective layer including first openings respectively exposing the upper terminals, a semiconductor chip on the upper protective layer, and the semiconductor chip including connection pads.
    Type: Application
    Filed: January 14, 2025
    Publication date: January 22, 2026
    Applicants: Samsung Electronics Co., Ltd., KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Taejae PARK, Chaein MOON, Inkyu PARK, Hyeonseok HAN, Cheolmin KIM, Sunchul KIM
  • Publication number: 20250309185
    Abstract: A solder reflow apparatus may include a reflow chamber, a heater and a stage. The reflow chamber may be configured to receive a heat transfer fluid. The heat transfer fluid may be configured for transferring heat to a solder for mounting an electronic part on a substrate. The heater may be configured to heat the heat transfer fluid in the reflow chamber. The stage may be in the reflow chamber to support the substrate. The stage may be inclined to a bottom surface of the reflow chamber to induce the heat transfer fluid toward a central portion of the substrate. Thus, the vertically ascended heat transfer fluid may be uniformly applied to the central portion and an edge portion of the substrate so that the solders at the central portion and the edge portion of the substrate may be uniformly soldered.
    Type: Application
    Filed: June 10, 2025
    Publication date: October 2, 2025
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Byungkeun Kang, Chaein Moon, Youngja Kim, Youngmin Lee
  • Publication number: 20250219014
    Abstract: A semiconductor reflow apparatus includes a conveyor comprising a laterally moveable surface configured to move in a first direction, a pickup tool including a head disposed above the conveyor, and an induction heating coil configured to generate a magnetic field in a direction passing through a surface of the conveyor, wherein the pickup tool is further configured to move the head in a vertical direction toward the conveyor.
    Type: Application
    Filed: December 27, 2024
    Publication date: July 3, 2025
    Inventors: Chaein Moon, Gongmyeong Kim, Sunchul Kim, Taejae Park, Hyeonrae Cho
  • Patent number: 12341124
    Abstract: A solder reflow apparatus may include a reflow chamber, a heater and a stage. The reflow chamber may be configured to receive a heat transfer fluid. The heat transfer fluid may be configured for transferring heat to a solder for mounting an electronic part on a substrate. The heater may be configured to heat the heat transfer fluid in the reflow chamber. The stage may be in the reflow chamber to support the substrate. The stage may be inclined to a bottom surface of the reflow chamber to induce the heat transfer fluid toward a central portion of the substrate. Thus, the vertically ascended heat transfer fluid may be uniformly applied to the central portion and an edge portion of the substrate so that the solders at the central portion and the edge portion of the substrate may be uniformly soldered.
    Type: Grant
    Filed: June 20, 2023
    Date of Patent: June 24, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byungkeun Kang, Chaein Moon, Youngja Kim, Youngmin Lee
  • Publication number: 20250201757
    Abstract: A chip bonding apparatus includes a stage configured to support a plurality of substrates, a bonding head located to face an upper surface of the stage in a vertical direction and configured to hold a plurality of semiconductor chips and transmit a laser beam, and a laser irradiating unit configured to irradiate a laser beam toward the semiconductor chips, wherein a plurality of trenches are formed in a lower surface of the bonding head.
    Type: Application
    Filed: December 10, 2024
    Publication date: June 19, 2025
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Taejae PARK, Gongmyeong KIM, Sunchul KIM, Chaein MOON, Hyeonrae CHO
  • Publication number: 20250174596
    Abstract: A method of manufacturing a semiconductor package include providing a substrate on a support plate. A semiconductor chip is placed on the substrate by a pick-up tool. An alternating current voltage is supplied to an induction coil positioned adjacent to the semiconductor chip. The pick-up tool includes an insulating material.
    Type: Application
    Filed: August 22, 2024
    Publication date: May 29, 2025
    Inventors: Sunchul KIM, Donguk Aditya kumar KWON, Gongmyeong KIM, Chaein MOON, Hyeonrae CHO
  • Publication number: 20250167056
    Abstract: Provided is a semiconductor package including a substrate defining a first recess portion and a plurality of second recess portions, the plurality of second recess portions are arranged on a bottom surface of the first recess portion, a semiconductor chip in the first recess portion of the substrate, solder balls arranged in the plurality of second recess portions of the substrate and electrically connected to the semiconductor chip, and a heat dissipation structure on the substrate and the semiconductor chip, the bottom surface of the first recess portion of the substrate being on a higher level than upper surfaces of the solder balls.
    Type: Application
    Filed: June 17, 2024
    Publication date: May 22, 2025
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Gyuhyeong KIM, Chaein MOON
  • Publication number: 20250079373
    Abstract: A semiconductor package includes a substrate including an insulating layer and a plurality of first pads on the insulating layer; a semiconductor chip including a plurality of second pads electrically connected to at least a portion of the plurality of first pads, the plurality of second pads overlapping the at least a portion of the plurality of first pads in a first direction; and a plurality of bumps on one surface of the substrate or one surface of the semiconductor chip, each of which has at least a portion having a melting point lower than a melting point of each of the plurality of first pads and a melting point of each of the plurality of second pads, wherein the plurality of bumps include a plurality of first bumps electrically connected to at least a portion of the plurality of first pads or at least a portion of the plurality of second pads, and at least one second bump having a permeability higher than a permeability of each of the plurality of first bumps.
    Type: Application
    Filed: June 12, 2024
    Publication date: March 6, 2025
    Inventor: Chaein Moon
  • Publication number: 20240321823
    Abstract: Provided is a semiconductor package with enhanced reliability and a method of manufacturing the same. The semiconductor package includes a package substrate including a body layer having a central area and a peripheral area, a first protective layer on a top surface of the body layer, and a second protective layer on the first protective layer in the peripheral area, a semiconductor chip mounted on the first protective layer in the central area in a flip-chip structure, an underfill in a gap between the first protective layer and the semiconductor chip and in a gap between the connection terminals, an interposer on the semiconductor chip, and inter-substrate connection terminals on the peripheral area of the package substrate and electrically connecting the package substrate to the interposer, where the underfill has an anchor structure extending into the first protective layer.
    Type: Application
    Filed: December 7, 2023
    Publication date: September 26, 2024
    Inventors: Donguk Kwon, Gongmyeong Kim, Sunchul Kim, Chaein Moon, Hyeonrae Cho
  • Publication number: 20240128229
    Abstract: A solder reflow apparatus may include a reflow chamber, a heater and a stage. The reflow chamber may be configured to receive a heat transfer fluid. The heat transfer fluid may be configured for transferring heat to a solder for mounting an electronic part on a substrate. The heater may be configured to heat the heat transfer fluid in the reflow chamber. The stage may be in the reflow chamber to support the substrate. The stage may be inclined to a bottom surface of the reflow chamber to induce the heat transfer fluid toward a central portion of the substrate. Thus, the vertically ascended heat transfer fluid may be uniformly applied to the central portion and an edge portion of the substrate so that the solders at the central portion and the edge portion of the substrate may be uniformly soldered.
    Type: Application
    Filed: June 20, 2023
    Publication date: April 18, 2024
    Inventors: Byungkeun Kang, Chaein Moon, Youngja Kim, Youngmin Lee
  • Publication number: 20240049400
    Abstract: A method of manufacturing an electronic device, includes: providing a substrate including a plurality of mounting regions on which electronic components are mounted respectively; forming a plurality of vapor passage holes that penetrate the substrate; disposing the electronic components on the substrate via bumps; heating a first heat transfer fluid to generate a second heat transfer fluid in a vapor state; supplying at least a portion of the second heat transfer fluid in the vapor state through the vapor passage holes of the substrate; and soldering the bumps using the at least the portion of the second heat transfer fluid in the vapor state.
    Type: Application
    Filed: March 28, 2023
    Publication date: February 8, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Youngja KIM, Donguk KWON, Youngmin LEE, Byungkeun KANG, Gongmyeong KIM, Chaein MOON