Patents by Inventor Chai-Liang Hsu

Chai-Liang Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9131614
    Abstract: A method for manufacturing an embedded wiring board is provided. An activating insulation layer is formed. The activating insulation layer includes a plurality of catalyst particles, and covers a first wiring layer. An intaglio pattern and at least one blind via partially exposing the first wiring layer are formed on the activating insulation layer, in which some of the catalyst particles are activated and exposed in the intaglio pattern and the blind via. The activating insulation layer is dipped in a first chemical plating solution, and a solid conductive pillar is formed in the blind via through electroless plating. The activating insulation layer is dipped in a second chemical plating solution after the solid conductive pillar is formed, and a second wiring layer is formed in the intaglio pattern through the electroless plating. Components of the first chemical plating solution and the second chemical plating solution are different.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: September 8, 2015
    Assignee: UNIMICRON TECHNOLOGY CORP.
    Inventors: Cheng-Po Yu, Chai-Liang Hsu
  • Patent number: 8373071
    Abstract: A method for manufacturing an embedded wiring board is provided. An activating insulation layer is formed, in which the activating insulation layer includes a plurality of catalyst particles, and covers a first wiring layer. An intaglio pattern and at least one blind via partially exposing the first wiring layer are formed on the activating insulation layer, in which some of the catalyst particles are activated and exposed in the intaglio pattern and the blind via. The activating insulation layer is dipped in a first chemical plating solution, and a solid conductive pillar is formed in the blind via through electroless plating. The activating insulation layer is dipped in a second chemical plating solution after the solid conductive pillar is formed, and a second wiring layer is formed in the intaglio pattern through the electroless plating. Components of the first chemical plating solution and the second chemical plating solution are different.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: February 12, 2013
    Assignee: Unimicron Technology Corp.
    Inventors: Cheng-Po Yu, Chai-Liang Hsu
  • Publication number: 20130011576
    Abstract: A method for manufacturing an embedded wiring board is provided. An activating insulation layer is formed. The activating insulation layer includes a plurality of catalyst particles, and covers a first wiring layer. An intaglio pattern and at least one blind via partially exposing the first wiring layer are formed on the activating insulation layer, in which some of the catalyst particles are activated and exposed in the intaglio pattern and the blind via. The activating insulation layer is dipped in a first chemical plating solution, and a solid conductive pillar is formed in the blind via through electroless plating. The activating insulation layer is dipped in a second chemical plating solution after the solid conductive pillar is formed, and a second wiring layer is formed in the intaglio pattern through the electroless plating. Components of the first chemical plating solution and the second chemical plating solution are different.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 10, 2013
    Applicant: UNIMICRON TECHNOLOGY CORP.
    Inventors: CHENG-PO YU, CHAI-LIANG HSU
  • Publication number: 20110139494
    Abstract: A method for manufacturing an embedded wiring board is provided. An activating insulation layer is formed, in which the activating insulation layer includes a plurality of catalyst particles, and covers a first wiring layer. An intaglio pattern and at least one blind via partially exposing the first wiring layer are formed on the activating insulation layer, in which some of the catalyst particles are activated and exposed in the intaglio pattern and the blind via. The activating insulation layer is dipped in a first chemical plating solution, and a solid conductive pillar is formed in the blind via through electroless plating. The activating insulation layer is dipped in a second chemical plating solution after the solid conductive pillar is formed, and a second wiring layer is formed in the intaglio pattern through the electroless plating. Components of the first chemical plating solution and the second chemical plating solution are different.
    Type: Application
    Filed: January 29, 2010
    Publication date: June 16, 2011
    Applicant: UNIMICRON TECHNOLOGY CORP.
    Inventors: Chen-Po Yu, Chai-Liang Hsu
  • Publication number: 20070263384
    Abstract: A light-mixing type light-emitting apparatus comprises a plurality of light-emitting diodes (LEDs) formed on a transparent carrier, wherein each of the LEDs with a transparent substrate emits light of a distinct color when driven, and the light beams generated from the LEDs are mixed to form a specific color. The transparent carrier setting forth in the present invention provides a mixing zone underlying the plurality of LEDs for the light beams to mix uniformly so as to improve the light-mixing efficiency of the light-emitting apparatus and shorten the mixing distance.
    Type: Application
    Filed: May 15, 2007
    Publication date: November 15, 2007
    Applicant: EPISTAR CORPORATION
    Inventors: Min-Hsun Hsieh, Chai-Liang Hsu, Chien-Fu Huang, Chih-Chiang Lu, Chun-Yi Wu