Abstract: Methods and apparatus for use in signal timing analysis with respect to a circuit having at least one gate are provided. In one aspect, the invention includes the step of determining a first constraint slew sensitivity value and a second constraint slew sensitivity value for the at least one gate according to a specified bounding technique. Then, a representative signal for the gate is computed in accordance with the first and second values including an arrival time and slew rate, wherein the representative signal bounds signal paths by bounding a maximum slew sensitivity path and a minimum slew sensitivity path. Such a representative signal may be computed for a worst case late-mode analysis and/or a best case early-mode analysis. The bounding technique may be selected by a user at the time the user inputs the schematic of the circuit on which timing analysis is to be performed.

Abstract: The invention is a bidirectional transposition exchange sorter for performing two overlapped sort operations overlapped in time with input/output operations so as to consume zero time. The sorter operates on the basis of a stack of cells, each of which contains two item storage locations and a comparator. The cells are arranged in a sorter stack configuration with a shift register monitor for each cell and an extra shift register position at the top of the sorter stack and also at the bottom. The monitor carries an indication of the current transfer mode for the cell. Each sort is carried out as two semi-sorts, input and output, which semi-sorts are time overlapped with the input and output operations typical of sort operations in computers. A portion of the sort operation takes place during an input step, so as to result in a partial reconfiguration of an unordered sequence at the end of the input semi-sort.

Abstract: A two-dimensional storage system having two dimensional access is described which offers advantages of speed and effective utilization of available storage area. The system is comprised of a plurality of bubble domain storage arrays, each of which has means therein for moving bubble domains in two dimensions. For instance, in each storage array bubbles can be moved either right-left or up-down. A functional area is provided between adjacent storage arrays to accommodate bubble movement to perform read, write, and clear functions and possibly logic functions. In one embodiment, the functional areas are comprised of sensors which simultaneously function as translation elements to map the information in one storage array into an adjacent array. Magnetic bubble domain sensors are provided for detecting bubble domains moved in one or two dimensions. For example, one sensor can be used to detect bubble domains moving right-left while another sensor is used to detect bubble domains moving up-down.

Abstract: A structure and technique are provided for improving the average access time in a bubble lattice file (BLF) storage, and for providing reordering capability in the lattice file. The bubble lattice arrangement includes a translation structure for moving bubble domains in the lattice to various access channels where columns of bubble domains can be removed from the lattice. These are double access channels which remove two adjacent columns of bubble domains at the same time. A read means and a write means are associated with each channel of the double channel access for reading the information in each column removed from the lattice, and for writing new information into these columns. A transposition structure is provided for transposing the information represented by bubble domains in each of the removed columns, in response to a signal from associated control circuitry.