Patents by Inventor Chakravarthy Yarlagadda

Chakravarthy Yarlagadda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for verifying the programming of multi-level flash EEPROM memory
    Patent number: 5523972
    Abstract: A programming verify circuit for controlling the memory cells to which programming voltages are applied, the circuit including a comparator for testing the state of each cell being programmed with the state to which the cell is being programmed, and a program load circuit which responds to the result of the test by the comparator to hold a condition for each memory cell being programmed to indicate whether the memory cell should be further programmed, each program load circuit including circuitry for precluding the holding of a condition indicating further programming is necessary once the associated memory cell has been initially verified as programmed by the comparator.
    Type: Grant
    Filed: June 2, 1994
    Date of Patent: June 4, 1996
    Assignee: Intel Corporation
    Inventors: Mamun Rashid, Mark Bauer, Chakravarthy Yarlagadda, Phillip M. L. Kwong, Albert Fazio
  • Block specific status information in a memory device
    Patent number: 5369754
    Abstract: A flash memory device having a plurality of flash array blocks and a block status register circuit containing a block status register for storing a block status for each flash array block. A flash array controller circuit in the flash memory device performs program or erase operations on the flash array blocks, and maintains the block status in each block status register. An interface circuit in the flash memory device enables read access of the block status registers over a bus.
    Type: Grant
    Filed: March 30, 1994
    Date of Patent: November 29, 1994
    Assignee: Intel Corporation
    Inventors: Mickey L. Fandrich, Chakravarthy Yarlagadda, Rodney R. Rozman, Geoffrey A. Gould
  • Block specific status information in a memory device
    Patent number: 5353256
    Abstract: A flash memory device having a plurality of flash array blocks and a block status register circuit containing a block status register for storing a block status for each flash array block. A flash array controller circuit in the flash memory device performs program or erase operations on the flash array blocks, and maintains the block status in each block status register. An interface circuit in the flash memory device enables read access of the block status registers over a bus.
    Type: Grant
    Filed: June 30, 1993
    Date of Patent: October 4, 1994
    Assignee: Intel Corporation
    Inventors: Mickey L. Fandrich, Chakravarthy Yarlagadda, Rodney R. Rozman, Geoffrey A. Gould