Patents by Inventor Chan-Chan LING

Chan-Chan LING has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200127160
    Abstract: A semiconductor light emitting device includes a multi-quantum-well structure, a first capping layer, a second capping layer, and an electron barrier layer stacked in order. The multi-quantum-well structure includes a plurality of alternately-stacked second potential barrier layers and potential well layers. The first capping layer is a semiconductor layer and the second capping layer is a p-doped semiconductor layer. Each of the first and second capping layers has a band gap larger than that of each of the second potential barrier layers and the band gap of the first capping layer is larger than that of the electron barrier layer. A method of preparing the semiconductor light emitting device is also provided.
    Type: Application
    Filed: December 17, 2019
    Publication date: April 23, 2020
    Inventors: Yung-Ling LAN, Chan-Chan LING, Chi-Ming TSAI, Chia-Hung CHANG
  • Publication number: 20200052155
    Abstract: Disclosed is a multi-quantum well structure including a stress relief layer, an electron-collecting layer disposed on the stress relief layer, and an active layer including a first active layer unit that is disposed on the electron-collecting layer. The first active layer unit includes potential barrier sub-layers and potential well sub-layers being alternately stacked, in which at least one of the potential barrier sub-layers has a GaN/Alx1Iny1Ga(1-x1-y1)N/GaN stack, where 0<x1?1 and 0?y1<1, and for the remainder of the potential barrier sub-layers, each of the potential barrier sub-layers is a GaN layer. An LED device including the multi-quantum well structure is also disclosed.
    Type: Application
    Filed: October 17, 2019
    Publication date: February 13, 2020
    Inventors: HAN JIANG, YUNG-LING LAN, WEN-PIN HUANG, CHANGWEI SONG, LI-CHENG HUANG, FEILIN XUN, CHAN-CHAN LING, CHI-MING TSAI, CHIA-HUNG CHANG
  • Patent number: 10535796
    Abstract: A semiconductor light emitting device includes a multi-quantum-well structure, a first potential barrier layer, a first capping layer, a second capping layer, and an electron barrier layer stacked in order on a growth substrate. The multi-quantum-well structure includes a plurality of alternately-stacked second potential barrier layers and potential well layers. The first capping layer is an undoped semiconductor layer and the second capping layer is a p-doped semiconductor layer. Each of the first and second capping layers has a band gap larger than that of each of the second potential barrier layers and the electron barrier layer. A method of preparing the semiconductor light emitting device is also provided.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: January 14, 2020
    Assignee: XIAMEN SAN'AN OPTOELECTRONICS CO., LTD.
    Inventors: Yung-Ling Lan, Chan-Chan Ling, Chi-Ming Tsai, Chia-Hung Chang
  • Publication number: 20190280155
    Abstract: A semiconductor light emitting device includes a multi-quantum-well structure, a first potential barrier layer, a first capping layer, a second capping layer, and an electron barrier layer stacked in order on a growth substrate. The multi-quantum-well structure includes a plurality of alternately-stacked second potential barrier layers and potential well layers. The first capping layer is an undoped semiconductor layer and the second capping layer is a p-doped semiconductor layer. Each of the first and second capping layers has a band gap larger than that of each of the second potential barrier layers and the electron barrier layer. A method of preparing the semiconductor light emitting device is also provided.
    Type: Application
    Filed: May 30, 2019
    Publication date: September 12, 2019
    Inventors: Yung-Ling LAN, Chan-Chan LING, Chi-Ming TSAI, Chia-Hung CHANG
  • Patent number: 10263139
    Abstract: A fabrication method of a nitride semiconductor LED includes, an AlxInyGa1-x-yN material layer is deposited by CVD between an AlN thin film layer by PVD and a gallium nitride series layer by CVD, to reduce the stress effect between the AlN thin film layer and the nitride layer, improve the overall quality of the LED and efficiency. An AlN thin film layer is deposited on a patterned substrate having a larger depth by PVD, and a thin nitrogen epitaxial layer is deposited on the AIN thin film layer by CVD, which reduces the stress by reducing the thickness of the epitaxial layer and improves warpage of the wafer and electric uniformity of the single wafer; the light extraction efficiency is improved by using the large depth patterned substrate; further, the doping of high-concentration impurity in the active layer effectively reduces voltage characteristics without affecting leakage, thereby improving the overall yield.
    Type: Grant
    Filed: January 8, 2017
    Date of Patent: April 16, 2019
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Hsiang-lin Hsieh, Zhibo Xu, Cheng-hung Lee, Chan-chan Ling, Chang-cheng Chuo, Chia-hung Chang
  • Patent number: 10115858
    Abstract: A method of fabricating a light emitting diode includes providing a substrate, and forming successively an N-type layer, an active layer, an electronic blocking layer, and a P-type layer over the substrate. The P-type layer includes a Mg-doped GaN material layer having a Mg impurity concentration of about 2×1019-2×1020 cm?3; and has a thickness of less than or equal to about 250 ?, and has a surface density of V-type defects of less than or equal to about 5×106 cm?2. Through these optimized growth conditions for the P-type layer, the light absorption of the P-type layer can be reduced, the electric leakage due to the relatively large density of V-type defects on the surface can be reduced, and the anti-static capacity of the light emitting diode fabricated thereby can be improved.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: October 30, 2018
    Assignee: XIAMEN SAN'AN OPTOELECTRONICS CO., LTD.
    Inventors: Chih-Ching Cheng, Chan-Chan Ling, Chia-Hung Chang
  • Patent number: 10096746
    Abstract: A semiconductor element includes a super-lattice buffer layer including AlxN1-x layers and AlyO1-y layers (0<x<1, 0<y<1). The super-lattice buffer layer can mitigate corrosion to the side wall by chemical solution during chip fabrication, and improve chip yield. Fabrication the super-lattice buffer layer to achieve the effects can be realized, for example, using chemical vapor deposition (CVD).
    Type: Grant
    Filed: May 27, 2017
    Date of Patent: October 9, 2018
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Sheng-wei Chou, Chang-cheng Chuo, Chan-chan Ling, Chia-hung Chang
  • Patent number: 10014436
    Abstract: A method for manufacturing a light emitting element includes: a GaN layer is formed on an AlN-deposited plain or patterned substrate, and the stress between different materials is changed and buffered through thermal treatment of annealing under H2 atmosphere or under H2 and NH3 mixed atmosphere, thus eliminating epitaxial wafer warp caused by such stress and improving epitaxial quality and light-emitting efficiency of the light-emitting element.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: July 3, 2018
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Cheng-Hung Lee, Sheng-Wei Chou, Chi-Hung Lin, Chan-Chan Ling, Chia-Hung Chang
  • Publication number: 20180158982
    Abstract: A method of fabricating a light emitting diode includes providing a substrate, and forming successively an N-type layer, an active layer, an electronic blocking layer, and a P-type layer over the substrate. The P-type layer includes a Mg-doped GaN material layer having a Mg impurity concentration of about 2×1019-2×1020 cm?3; and has a thickness of less than or equal to about 250 ?, and has a surface density of V-type defects of less than or equal to about 5×106 cm?2. Through these optimized growth conditions for the P-type layer, the light absorption of the P-type layer can be reduced, the electric leakage due to the relatively large density of V-type defects on the surface can be reduced, and the anti-static capacity of the light emitting diode fabricated thereby can be improved.
    Type: Application
    Filed: January 15, 2018
    Publication date: June 7, 2018
    Applicant: XIAMEN SAN'AN OPTOELECTRONICS CO., LTD.
    Inventors: CHIH-CHING CHENG, CHAN-CHAN LING, CHIA-HUNG CHANG
  • Publication number: 20180138367
    Abstract: A nitride light emitting diode includes a substrate and a nitride buffer layer, an n-type layer, a quantum well light emitting layer, and a p-type layer over the substrate. The n-type layer is a superlattice structure formed by alternating undoped AlGaN layers and n-type doped GaN layers. The Al component of the undoped AlGaN layer is controlled to produce first stress that offsets the second stress produced by the n-type doped GaN layer, reducing crystal defects and wrapping caused by impurity doping of the n-type layer. Growth temperature and pressure of the n-type layer are controlled such that thickness of the n-type doped GaN layer is greater than that of the undoped AlGaN layer to improve surface roughness of the undoped AlGaN layer and form an n-type doped GaN layer with a flat surface. Series resistance, crystal defects and wrapping, and optoelectronic properties of the device are therefore improved.
    Type: Application
    Filed: January 13, 2018
    Publication date: May 17, 2018
    Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yung-ling LAN, Chia-hung CHANG, Chan-chan LING, Wen-pin HUANG
  • Patent number: 9929308
    Abstract: A nitride light-emitting diode (LED) fabrication method includes: providing a glass substrate; stacking a buffer layer structure composed of circular SiAlN layers and AlGaN layers with the number of cycles 1-5; growing a non-doped GaN layer, an N-type layer, a quantum well layer and a P-type layer. By using the low-cost glass the substrate that has a mature processing technology, and growing a SiAlN and an AlGaN buffer layer thereon, lattice mismatch constant between the substance and the epitaxial layer can be improved. Therefore, photoelectric property of the LED can be improved.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: March 27, 2018
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Hsiang-pin Hsieh, Changwei Song, Chia-hung Chang, Chan-chan Ling
  • Publication number: 20170309773
    Abstract: A nitride light-emitting diode (LED) fabrication method includes: providing a glass substrate; stacking a buffer layer structure composed of circular SiAlN layers and AlGaN layers with the number of cycles 1-5; growing a non-doped GaN layer, an N-type layer, a quantum well layer and a P-type layer. By using the low-cost glass the substrate that has a mature processing technology, and growing a SiAlN and an AlGaN buffer layer thereon, lattice mismatch constant between the substance and the epitaxial layer can be improved. Therefore, photoelectric property of the LED can be improved.
    Type: Application
    Filed: July 13, 2017
    Publication date: October 26, 2017
    Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Hsiang-pin HSIEH, Changwei SONG, Chia-hung CHANG, Chan-chan LING
  • Publication number: 20170263822
    Abstract: A semiconductor element includes a super-lattice buffer layer including AlxN1-x layers and AlyO1-y layers (0<x<1, 0<y<1). The super-lattice buffer layer can mitigate corrosion to the side wall by chemical solution during chip fabrication, and improve chip yield. Fabrication the super-lattice buffer layer to achieve the effects can be realized, for example, using chemical vapor deposition (CVD).
    Type: Application
    Filed: May 27, 2017
    Publication date: September 14, 2017
    Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Sheng-wei CHOU, Chang-cheng CHUO, Chan-chan LING, Chia-hung CHANG
  • Publication number: 20170148945
    Abstract: A method for manufacturing a light emitting element includes: a GaN layer is formed on an AlN-deposited plain or patterned substrate, and the stress between different materials is changed and buffered through thermal treatment of annealing under H2 atmosphere or under H2 and NH3 mixed atmosphere, thus eliminating epitaxial wafer warp caused by such stress and improving epitaxial quality and light-emitting efficiency of the light-emitting element.
    Type: Application
    Filed: February 6, 2017
    Publication date: May 25, 2017
    Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Cheng-Hung LEE, Sheng-Wei CHOU, Chi-Hung LIN, Chan-Chan LING, Chia-Hung CHANG
  • Publication number: 20170148949
    Abstract: A nitride light-emitting diode (LED) structure includes a substrate, a buffer layer, an N-type layer, a stress release layer, a quantum well light-emitting layer and a P-type layer, wherein, between the N-type layer and the stress release layer, an electric field distribution layer is inserted, which is an n-doped multi-layer GaN structure with growth temperature equaling to or lower than that of the quantum well light-emitting layer; and GaN layers of different doping concentrations are applied to gradually reduce electric field concentration and make uniform spreading of current, thus enhancing electrostatic voltage endurance, reducing failure rate during usage, improving operational reliability and extending service life of the nitride semiconductor component.
    Type: Application
    Filed: February 7, 2017
    Publication date: May 25, 2017
    Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yung-ling LAN, Chia-hung CHANG, Chan-chan LING, Hsiang-lin HSIEH, Hsiang-pin HSIEH, Zhibo XU