Abstract: This is a halftone circuit which, in addition to the usual counting and addressing mechanisms, has control over the phase, angle and direction of the addressing circuitry of the array in memory so that regular dots, mirror images of dots and out-of-phase dots can be created from a single array, thus saving memory hardware. The mirror images can be made by counting rows in either direction, the angle can be varied by varying the number of pixels shifted between scans, and the phase can be varied by setting the starting point to any row and column. In this way, a single array can be used to create a number of dots.

Abstract: A circuit which uses less memory to store halftone arrays in a high addressability printer by storing regular halftone arrays as low addressability arrays and by outputting each pixel a number of times, the number being the ratio of high to low addressability. For example, if a high addressability system uses 4 sub pixels for each pixel, then one value of each low addressability array is stored in one location and the halftone circuit is controlled to output that value 4 times, once for each sub pixel thus saving memory by a factor of 4.