Patents by Inventor Chan Chang

Chan Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250233316
    Abstract: A multifunctional reconfigurable reflectarray structure (RRA) includes a radiation layer and a direct current bias layer. The radiation layer includes a first metal member, a second metal member, a first diode and a second diode. The first diode is connected between the first metal member and the second metal member. The second diode is coupled to the second metal member. The direct current bias layer is connected to the first diode and the second diode. A first working state of the first diode and a second working state of the second diode are controlled by a first input signal and a second input signal. The radiation layer is modulated according to the first working state and second working state, so that an electromagnetic wave forms one of a single-beam reflection and a dual-beam reflection after being incident on the radiation layer, or is absorbed by the radiation layer.
    Type: Application
    Filed: September 2, 2024
    Publication date: July 17, 2025
    Inventors: Shih-Cheng LIN, Sheng-Fuh CHANG, Chia-Chan CHANG, Yuan-Chun LIN, Ting-Hao SHIH
  • Publication number: 20250190005
    Abstract: A current driver having an input channel and an output channel includes a current source, a current mirror, an output enable switch and a control circuit. The current source is deployed in the input channel. The current mirror is deployed between the input channel and the output channel and coupled to the current source. The output enable switch is deployed in the output channel and coupled to the current mirror. The control circuit is coupled between the input channel and the output channel, to form a feedback loop through the input channel.
    Type: Application
    Filed: September 11, 2024
    Publication date: June 12, 2025
    Applicant: NOVATEK Microelectronics Corp.
    Inventors: Ren-Chieh Yang, Jui-Chan Chang, Jin-Yi Lin, Jhih-Siou Cheng
  • Publication number: 20250157899
    Abstract: A package structure includes a lead frame, a die, a bonding wire, a first solder and a molding material. The lead frame includes a cavity, and the die is disposed in the cavity. The die includes a substrate, a bonding pad and a backside metal layer. The bonding pad is disposed on a first surface of the substrate. The backside metal layer is disposed on a second surface of the substrate. The bonding wire electrically connects the bonding pad of the die to the lead frame. The first solder is disposed between the backside metal layer and the cavity. The die is soldered onto the lead frame through the first solder. The molding material encapsulates the die and the bonding wire, and also covers the lead frame.
    Type: Application
    Filed: November 13, 2023
    Publication date: May 15, 2025
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsiu-Mei Yu, Wei-Chan Chang, Cheng-Yi Hsieh
  • Publication number: 20250149366
    Abstract: A wafer holding device configured to fix a and position a wafer having a positioning structure. The wafer holding device includes a base, a holder plate, pushing pins, a linear actuator, and a positioning member. The holder plate is disposed on the base. An upper surface of the holder plate is provided with an adsorption structure for adsorbing and fixing the wafer. The pushing pins are disposed on the upper surface in a protruding manner, and each pushing pin is disposed on the holder plate with respect to a predetermined datum center on the holder plate. The linear actuator is disposed on the base, and an actuating direction of the linear actuator is in parallel to the upper surface. The positioning member is driven by the linear actuator to move in the actuating direction to contact and push against the positioning structure of the wafer.
    Type: Application
    Filed: November 7, 2023
    Publication date: May 8, 2025
    Inventors: Jung-Hua Chang, Ta-Hao Kuo, Mao-Chan Chang
  • Publication number: 20250149798
    Abstract: A system having a Reconfigurable ReflectArray (RRA) structure includes a radiation layer and a control layer. The radiation layer includes at least one P-Intrinsic-N (P-I-N) diode and a plurality of reconfigurable reflective units. At least one part of the reconfigurable reflective units is electrically connected to the at least one P-I-N diode. The control layer includes at least one switch element and at least one control unit. The at least one switch element is electrically connected to the radiation layer. The at least one control unit is electrically connected to the at least one switch element. The number of the reconfigurable reflective units is different from the number of the at least one switch element.
    Type: Application
    Filed: July 2, 2024
    Publication date: May 8, 2025
    Inventors: Shih-Cheng LIN, Sheng-Fuh CHANG, Chia-Chan CHANG, Yuan-Chun LIN, Ting-Hao SHIN
  • Patent number: 12284005
    Abstract: A reconfigurable intelligent surface includes a radiant layer, a sensing feeding circuit layer, a processing layer and a controlling circuit layer. The radiant layer includes at least two antennas and a plurality of reflecting units. Each of the at least two antennas is configured for sensing a polarization, a frequency or a direction angle of an incident electromagnetic wave. The reflecting units are arranged to form a reflecting surface. The sensing feeding circuit layer is signally connected to the antennas. The processing layer is signally connected to the sensing feeding circuit layer, and the processing layer is configured to produce a controlling signal corresponding thereto. The controlling circuit layer is signally connected to the radiant layer and the processing layer, wherein the controlling circuit layer receives the controlling signal and controls the reflecting units according to the controlling signal to adjust and form a reflecting electromagnetic wave.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: April 22, 2025
    Assignee: NATIONAL CHUNG CHENG UNIVERSITY
    Inventors: Chia-Chan Chang, Sheng-Fuh Chang, Shih-Cheng Lin, Yuan-Chun Lin, Wei-Lun Hsu
  • Publication number: 20250055188
    Abstract: A Reconfigurable ReflectArray (RRA) structure includes a P-Intrinsic-N (P-I-N) diode and a metal circuit. The metal circuit includes a first metal member and a second metal member. The first metal member is coupled to one end of the P-I-N diode. The second metal member is coupled to another end of the P-I-N diode. One of the first metal member and the second metal member includes a first radiating portion and a second radiating portion. The first radiating portion is located between the P-I-N diode and the second radiating portion. The first radiating portion has a first length. The second radiating portion has a second length. The first length is different from the second length.
    Type: Application
    Filed: February 1, 2024
    Publication date: February 13, 2025
    Inventors: Shih-Cheng LIN, Sheng-Fuh CHANG, Chia-Chan CHANG, Yuan-Chun LIN, Ting-Hao SHIN
  • Publication number: 20250022766
    Abstract: A semiconductor device includes: a substrate; a seed layer disposed on the substrate; a compound semiconductor stack layer disposed on the seed layer; and a source metal layer and a drain metal layer disposed on the compound semiconductor stack layer. The semiconductor device further includes a conductive layer at least partially covering the source metal layer and the drain metal layer, and covering opposing side surfaces of the seed layer and opposing side surfaces of the compound semiconductor stack layer. The conductive layer electrically connects the seed layer and the source metal layer.
    Type: Application
    Filed: October 1, 2024
    Publication date: January 16, 2025
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsiu-Mei YU, Guang-Yuan JIANG, Cheng-Yi HSIEH, Wei-Chan CHANG, Chang-Sheng LIN
  • Publication number: 20250007475
    Abstract: A calibration circuit of a differential difference amplifier (DDA) includes a trimming circuit, a bias generator and a compensation output circuit. The trimming circuit is used to output a trimming code. The bias generator, coupled to the trimming circuit, is used to generate a bias current or voltage according to the trimming code. The compensation output circuit, coupled to the bias generator, is used to receive a data code of the DDA and output the bias current or voltage corresponding to the data code to the DDA.
    Type: Application
    Filed: April 1, 2024
    Publication date: January 2, 2025
    Applicant: NOVATEK Microelectronics Corp.
    Inventors: Jui-Chan Chang, Jhih-Siou Cheng, Ren-Chieh Yang, Jin-Yi Lin
  • Publication number: 20240407116
    Abstract: An electronic device includes a housing, a first metal trace, a conductive pillar, a circuit board, and a metal connecting element. The housing includes a conductive via and a concave hole, and the conductive via passes through the housing. The first metal trace is disposed on an inner surface of the housing, and the conductive via is electrically connected to the first metal trace. The conductive pillar is disposed in the concave hole and exposed from the housing, and the conductive pillar is electrically connected to the conductive via. The circuit board is disposed inside the housing. The metal connecting element is disposed on the circuit board and electrically connected to the first metal trace.
    Type: Application
    Filed: February 6, 2024
    Publication date: December 5, 2024
    Inventors: YU-FU KUO, YUAN-CHIN HSU, HSIAO-CHAN CHANG
  • Patent number: 12141392
    Abstract: The present invention discloses a display panel and a display device. The display panel comprises a plurality of common electrode blocks and a plurality of display regions. During a display period, one or more common electrode blocks corresponding to one of the display regions which is to be displayed during the display period are coupled to a common voltage; and during the display period, one or more of the common electrode blocks corresponding to the display regions which are not to be displayed during the display period are kept in a floating state.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: November 12, 2024
    Assignee: Novatek Microelectronics Corp.
    Inventors: Keko-Chun Liang, Jhih-Siou Cheng, Hsu-Chih Wei, Jui-Chan Chang, Ju-Lin Huang, Po-Ying Chen, Wen-Yi Hsieh
  • Patent number: 12131973
    Abstract: A semiconductor device includes: a substrate; a seed layer disposed on the substrate; a compound semiconductor stack layer disposed on the seed layer; and a source metal layer and a drain metal layer disposed on the compound semiconductor stack layer. The semiconductor device further includes a conductive layer at least partially covering the source metal layer and the drain metal layer, and covering opposing side surfaces of the seed layer and opposing side surfaces of the compound semiconductor stack layer. The conductive layer electrically connects the seed layer and the source metal layer.
    Type: Grant
    Filed: June 23, 2022
    Date of Patent: October 29, 2024
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hsiu-Mei Yu, Guang-Yuan Jiang, Cheng-Yi Hsieh, Wei-Chan Chang, Chang-Sheng Lin
  • Patent number: 12125721
    Abstract: A parallelism-adjustable bonding machine includes a first chamber, a second chamber, a press-bonding unit, a carrier and plural parallelism-adjusting units. The first chamber is configured to connect to the second chamber, so as to define a closed space therebetween. The press-bonding unit is disposed within the first chamber, and the carrier is disposed within the second chamber. The press-bonding unit is disposed to face the carrier configured to press and bond substrates placed on the carrier. Each of the parallelism-adjusting units is disposed on the first chamber, and includes an adjustment shaft extending through the first chamber and connected to the press-bonding unit. The adjustment shaft includes an adjustment member located outside the first chamber and the closed space. A user is able to adjust a parallelism between the press-bonding unit and the carrier in an efficient and precise manner, from the adjustment member.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: October 22, 2024
    Assignee: SKY TECH INC.
    Inventors: Jing-Cheng Lin, Jung-Hua Chang, Mao-Chan Chang
  • Patent number: 12107332
    Abstract: Provided is an electromagnetic wave reflectarray, including a first substrate, a second substrate, first wires and second wires respectively arranged on the first substrate and the second substrate along a first direction and a second direction, antenna electrodes and tuning electrodes respectively arranged into first electrode strings and second electrode strings electrically connected to the first wires and the second wires on the first substrate and the second substrate along the first direction, and a liquid crystal layer disposed between the first substrate and the second substrate. The tuning electrodes completely cover the orthographic projections of the antenna electrodes on the second substrate.
    Type: Grant
    Filed: August 11, 2022
    Date of Patent: October 1, 2024
    Assignee: TMY Technology Inc.
    Inventors: Su-Wei Chang, Sheng-Fuh Chang, Chia-Chan Chang, Shih-Cheng Lin, Yuan-Chun Lin
  • Publication number: 20240230739
    Abstract: A measurement device and a method of measuring a radiation pattern by using the same are provided. The measurement device includes at least one positioner configured to move a first antenna for measuring a main lobe and a back lobe of an electromagnetic wave radiated from the first antenna.
    Type: Application
    Filed: January 6, 2023
    Publication date: July 11, 2024
    Applicants: Advanced Semiconductor Engineering, Inc., National Chung Cheng University
    Inventors: Sheng-Chi HSIEH, Chen-Chao WANG, Sheng-Fuh CHANG, Chia-Chan CHANG, Shih-Cheng LIN, Yuan-Chun LIN, Wei-Lun HSU, Kuo-Hung CHENG
  • Patent number: 12034222
    Abstract: An electromagnetic wave transmission structure including a substrate, at least one transmission line, antennas, and tunable dielectric units is provided. The transmission line includes a first extending portion and second extending portions. The first extending portion is extended in a first direction. The second extending portions are respectively extended from two opposite edges of the first extending portion, and an extending direction thereof is parallel to a second direction. The second extending portions are arranged along the first direction. The antennas are disposed near the at least one transmission line. The tunable dielectric units are overlapped with portions of the at least one transmission line located between the antennas. Each tunable dielectric unit has an overlapped first electrode layer and controllable dielectric layer. The controllable dielectric layer is disposed between the first electrode layer and the at least one transmission line.
    Type: Grant
    Filed: August 3, 2022
    Date of Patent: July 9, 2024
    Assignee: TMY Technology Inc.
    Inventors: Su-Wei Chang, Sheng-Fuh Chang, Chia-Chan Chang, Shih-Cheng Lin, Yuan-Chun Lin
  • Patent number: 11961753
    Abstract: A substrate-bonding device includes a carrier, three first aligning units, three second aligning units, a pressing plate, and two flat-edge aligners. A carrying surface of the carrier is provided with a placement area for placing a first substrate provided with a flat edge thereon. The first aligning units, the second aligning units and the flat edge aligners are disposed around the placement area. The first aligning units are configured to align the first substrate and to support a second substrate provided with a second flat edge. The second aligning units are configured to align the second substrate. The flat edge aligners are configured to contact the first and the second flat edges, to position and align the first and the second substrates. The pressing plate is disposed to face the placement area for pressing the first and second substrates. The flat edge aligners move along with the pressing plate.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: April 16, 2024
    Assignee: SKY TECH INC.
    Inventors: Jing-Cheng Lin, Jung-Hua Chang, Mao-Chan Chang
  • Patent number: 11935878
    Abstract: A method for manufacturing a package structure includes providing a carrier board; providing at least one die having a top surface, a bottom surface, and a side surface on the carrier board; and forming a protective layer to cover at least a portion of the side surface of the die. The die includes a substrate, a semiconductor layer, a gate structure, a source structure and a drain structure, at least one dielectric layer, and at least one pad. The semiconductor layer is disposed on the substrate. The gate structure is disposed on the semiconductor layer. The source and the drain structures are disposed on opposite sides of the gate structure. The dielectric layer covers the gate, source, and drain structures. The pad is disposed on the dielectric layer and penetrates through the dielectric layer to electrically contact with the gate, source or drain structure.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: March 19, 2024
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hsiu-Mei Yu, Guang-Yuan Jiang, Cheng-Yi Hsieh, Wei-Chan Chang, Chang-Sheng Lin
  • Patent number: 11900896
    Abstract: A source driver includes a plurality of output terminals and a plurality of driving channels. Each of the plurality of driving channels is coupled to an output terminal among the plurality of output terminals and includes an output buffer, an output enable switch and a charge sharing circuit. The output enable switch is coupled between the output buffer and the corresponding output terminal. The charge sharing circuit is coupled to the corresponding output terminal. Wherein, the charge sharing circuits of at least two of the plurality of driving channels are commonly coupled to a charge sharing bus.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: February 13, 2024
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Jhih-Siou Cheng, Yen-Kai Chen, Jui-Chan Chang, Chih-Hsien Chou
  • Publication number: 20240047857
    Abstract: A reconfigurable intelligent surface includes a radiant layer, a sensing feeding circuit layer, a processing layer and a controlling circuit layer. The radiant layer includes at least two antennas and a plurality of reflecting units. Each of the at least two antennas is configured for sensing a polarization, a frequency or a direction angle of an incident electromagnetic wave. The reflecting units are arranged to form a reflecting surface. The sensing feeding circuit layer is signally connected to the antennas. The processing layer is signally connected to the sensing feeding circuit layer, and the processing layer is configured to produce a controlling signal corresponding thereto. The controlling circuit layer is signally connected to the radiant layer and the processing layer, wherein the controlling circuit layer receives the controlling signal and controls the reflecting units according to the controlling signal to adjust and form a reflecting electromagnetic wave.
    Type: Application
    Filed: October 31, 2022
    Publication date: February 8, 2024
    Inventors: Chia-Chan CHANG, Sheng-Fuh CHANG, Shih-Cheng LIN, Yuan-Chun LIN, Wei-Lun HSU