Patents by Inventor Chan Hoon Ko

Chan Hoon Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240149595
    Abstract: Disclosed herein are a printing apparatus that is mounted with roll-shaped drawable printing paper made of thermal paper whose color changes by heat, performs printing on the printing paper and cuts the printing paper via a cutter, and a printing method that is performed by the printing apparatus.
    Type: Application
    Filed: November 7, 2023
    Publication date: May 9, 2024
    Inventors: Chan Wook KANG, Nam Young KIM, Hyung Jae KO, Jae Hoon JEONG
  • Publication number: 20240146409
    Abstract: The present application relates to a method of generating a downlink frame. The method of generating the downlink frame includes: generating a first short sequence and a second short sequence indicating cell group information; generating a first scrambling sequence and a second scrambling sequence determined by the primary synchronization signal; generating a third scrambling sequence determined by the first short sequence and a fourth scrambling sequence determined by the second short sequence; scrambling the short sequences with the respective scrambling sequences; and mapping the secondary synchronization signal that includes the first short sequence scrambled with the first scrambling sequence, the second short sequence scrambled with the second scrambling sequence and the third scrambling sequence, the second short sequence scrambled with the first scrambling sequence and the first short sequence scrambled by the second scrambling sequence and the fourth scrambling sequence to a frequency domain.
    Type: Application
    Filed: January 6, 2024
    Publication date: May 2, 2024
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Kap Seok CHANG, Il Gyu KIM, Hyeong Geun PARK, Young Jo KO, Hyo Seok Yl, Chan Bok JEONG, Young Hoon KIM, Seung Chan BANG
  • Publication number: 20230354520
    Abstract: A printed circuit board includes a first insulating layer, a metal pad including a first metal portion disposed on the first insulating layer, and a second metal portion disposed on the first metal portion and integrated with the first metal portion without a boundary therebetween, the second metal portion having a width narrower than a width of the first metal portion on a cross section, a second insulating layer disposed on the first insulating layer and covering at least a portion of a side surface of the first metal portion, and a surface metal layer disposed on the metal pad and covering at least a portion of each of an upper surface and a side surface of the second metal portion.
    Type: Application
    Filed: November 9, 2022
    Publication date: November 2, 2023
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Chan Hoon KO, Ki Hee CHO, Sang Hoon KIM
  • Publication number: 20230335479
    Abstract: A printed circuit board includes a first insulating layer; a pad disposed on the insulating layer and having a protrusion; and a protective layer disposed on the insulating layer and having an opening exposing at least a portion of the pad. The protrusion protrudes from one surface of the pad and is buried in at least one of the insulating layer and the protective layer.
    Type: Application
    Filed: June 16, 2023
    Publication date: October 19, 2023
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Chan Hoon KO, Sang Hoon KIM, Yoong OH, Hea Sung KIM
  • Patent number: 11735510
    Abstract: A printed circuit board includes an insulating layer; and an external connection pad embedded in the insulating layer and having one surface exposed. The external connection pad may include a base pad portion having a first pattern portion in contact with a side surface of the insulating layer and having a first width, and a second pattern portion protruding from the first pattern portion and having a second width smaller than the first width, the second pattern portion having a gap with the side surface of the insulating layer, and a surface treatment layer disposed in the gap between the second pattern portion and the insulating layer and extending on an upper surface of the second pattern portion.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: August 22, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Chan Hoon Ko
  • Patent number: 11729910
    Abstract: A printed circuit board includes a substrate including an external connection pad; and a metal post extending to the outside of the substrate in a thickness direction of the substrate from the external connection pad. The metal post may include a first post portion, elongated while having a substantially constant width, a second post portion extending to the outside of the substrate in the thickness direction of the substrate while having a narrow width, and a third post portion extending to the outside of the substrate in the thickness direction of the substrate from the second post portion while having substantially the same width as the first post portion. The third post portion may forma lower end portion of the metal post.
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: August 15, 2023
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Chan Hoon Ko
  • Patent number: 11722756
    Abstract: A camera module is provided. The camera module includes: a housing; a lens barrel disposed in the housing; a cover screen disposed over the lens barrel; a blade pivotably coupled to the cover screen and configured to have at least a portion in contact with a surface of the cover screen; and a rotation member disposed on the blade and configured to pivot the blade with respect to the cover screen.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: August 8, 2023
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Chan Hoon Ko, Won Kyu Jang, Hee Sung Jun
  • Publication number: 20230199974
    Abstract: A printed circuit board including: a first insulating layer; a first wiring layer disposed on an upper surface of the first insulating layer, and including a first wiring portion and a second wiring portion; and a second insulating layer disposed on the upper surface of the first insulating layer, having a cavity exposing an upper surface of the second wiring portion, and including a first insulating portion covering the first wiring portion and a second insulating portion whose upper surface is exposed from the cavity, wherein one or more gaps are provided between the second wiring portion and the second insulating portion.
    Type: Application
    Filed: March 18, 2022
    Publication date: June 22, 2023
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Chan Hoon KO, Kee Su JEON, Ki Eun CHO, Min Jae SEONG
  • Publication number: 20220394158
    Abstract: A camera module is provided. The camera module includes: a housing; a lens barrel disposed in the housing; a cover screen disposed over the lens barrel; a blade pivotably coupled to the cover screen and configured to have at least a portion in contact with a surface of the cover screen; and a rotation member disposed on the blade and configured to pivot the blade with respect to the cover screen.
    Type: Application
    Filed: April 20, 2022
    Publication date: December 8, 2022
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Chan Hoon KO, Won Kyu JANG, Hee Sung JUN
  • Publication number: 20220192017
    Abstract: A printed circuit board includes a substrate including an external connection pad; and a metal post extending to the outside of the substrate in a thickness direction of the substrate from the external connection pad. The metal post may include a first post portion, elongated while having a substantially constant width, a second post portion extending to the outside of the substrate in the thickness direction of the substrate while having a narrow width, and a third post portion extending to the outside of the substrate in the thickness direction of the substrate from the second post portion while having substantially the same width as the first post portion. The third post portion may forma lower end portion of the metal post.
    Type: Application
    Filed: March 2, 2021
    Publication date: June 16, 2022
    Inventor: Chan Hoon Ko
  • Publication number: 20220189865
    Abstract: A printed circuit board includes an insulating layer; and an external connection pad embedded in the insulating layer and having one surface exposed. The external connection pad may include a base pad portion having a first pattern portion in contact with a side surface of the insulating layer and having a first width, and a second pattern portion protruding from the first pattern portion and having a second width smaller than the first width, the second pattern portion having a gap with the side surface of the insulating layer, and a surface treatment layer disposed in the gap between the second pattern portion and the insulating layer and extending on an upper surface of the second pattern portion.
    Type: Application
    Filed: April 12, 2021
    Publication date: June 16, 2022
    Inventor: Chan Hoon KO
  • Publication number: 20220181245
    Abstract: A printed circuit board includes a first insulating layer; a pad disposed on the insulating layer and having a protrusion; and a protective layer disposed on the insulating layer and having an opening exposing at least a portion of the pad. The protrusion protrudes from one surface of the pad and is buried in at least one of the insulating layer and the protective layer.
    Type: Application
    Filed: March 3, 2021
    Publication date: June 9, 2022
    Inventors: Chan Hoon KO, Sang Hoon KIM, Yoong OH, Hea Sung KIM
  • Patent number: 8906740
    Abstract: A method of manufacture of an integrated circuit packaging system includes: mounting an integrated circuit, having a device through via and a device interconnect, over a substrate with the device through via traversing the integrated circuit and the device interconnect attached to the device through via; attaching a conductive support over the substrate with the conductive support adjacent to the integrated circuit; providing a pre-formed interposer, having an interposer through via and a pre-attached interconnect, with the pre-attached interconnect attached to the interposer through via; mounting the pre-formed interposer over the integrated circuit and the conductive support with the pre-attached interconnect over the device through via; and forming an encapsulation over the substrate covering the integrated circuit, the conductive support, and partially covering the pre-formed interposer.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: December 9, 2014
    Assignee: STATS ChipPAC Ltd.
    Inventors: Chan Hoon Ko, Soo-San Park, YoungChul Kim
  • Patent number: 8535981
    Abstract: A method of manufacturing of an integrated circuit packaging system includes: providing a bottom package in a cavity in a central region of the bottom package having inter-package interconnects in the cavity; forming a vent on an inter-package connection side of the bottom package from an exterior of the bottom package to the cavity; mounting a top package on the inter-package interconnects; and applying an underfill through the vent and into the cavity.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: September 17, 2013
    Assignee: Stats Chippac Ltd.
    Inventors: Chan Hoon Ko, SeungYun Ahn
  • Publication number: 20120228753
    Abstract: A method of manufacturing of an integrated circuit packaging system includes: providing a bottom package in a cavity in a central region of the bottom package having inter-package interconnects in the cavity; forming a vent on an inter-package connection side of the bottom package from an exterior of the bottom package to the cavity; mounting a top package on the inter-package interconnects; and applying an underfill through the vent and into the cavity.
    Type: Application
    Filed: March 10, 2011
    Publication date: September 13, 2012
    Inventors: Chan Hoon Ko, SeungYun Ahn
  • Patent number: 8067828
    Abstract: An integrated circuit package-in-package system including: providing a substrate; mounting a structure over the substrate; supporting an inner stacking module cantilevered over the substrate by an electrical interconnect connected to the substrate, the electrical interconnect forming a gap between the inner stacking module and the structure controlled by the size of the electrical interconnect; and encapsulating the structure and inner stacking module with an encapsulation.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: November 29, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Chan Hoon Ko, Soo-San Park
  • Patent number: 8004073
    Abstract: A method of manufacture of an integrated circuit packaging system includes: attaching a lower integrated circuit, having a first through via, over a substrate with the first through via coupled to the substrate; mounting a pre-formed interposer, having an interposer through via and an integrated passive device, over the lower integrated circuit with the interposer through via coupled to the first through via; attaching an upper integrated circuit, having a second through via, over the pre-formed interposer; and forming an encapsulation over the upper integrated circuit and the pre-formed interposer.
    Type: Grant
    Filed: June 17, 2009
    Date of Patent: August 23, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Chan Hoon Ko, Soo-San Park
  • Publication number: 20110186994
    Abstract: A method of manufacture of an integrated circuit packaging system includes: mounting an integrated circuit, having a device through via and a device interconnect, over a substrate with the device through via traversing the integrated circuit and the device interconnect attached to the device through via; attaching a conductive support over the substrate with the conductive support adjacent to the integrated circuit; providing a pre-formed interposer, having an interposer through via and a pre-attached interconnect, with the pre-attached interconnect attached to the interposer through via; mounting the pre-formed interposer over the integrated circuit and the conductive support with the pre-attached interconnect over the device through via; and forming an encapsulation over the substrate covering the integrated circuit, the conductive support, and partially covering the pre-formed interposer.
    Type: Application
    Filed: April 12, 2011
    Publication date: August 4, 2011
    Inventors: Chan Hoon Ko, Soo-San Park, YoungChul Kim
  • Patent number: 7968995
    Abstract: A method of manufacture an integrated circuit packaging system includes: providing a base substrate; mounting a first base integrated circuit over the base substrate; mounting a second base integrated circuit over the first base integrated circuit; attaching a stacking interconnect to the base substrate and adjacent to the first base integrated circuit; and forming a base encapsulation, having a recess portion from a corner of the base encapsulation and a step portion adjacent to the recess portion, with the step portion over the second base integrated circuit and the recess portion exposing the stacking interconnect.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: June 28, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Chan Hoon Ko, Soo-San Park, HeeJo Chi
  • Patent number: 7923290
    Abstract: A method of manufacture of an integrated circuit packaging system includes: mounting an integrated circuit, having a device through via and a device interconnect, over a substrate with the device through via traversing the integrated circuit and the device interconnect attached to the device through via; attaching a conductive support over the substrate with the conductive support adjacent to the integrated circuit; providing a pre-formed interposer, having an interposer through via and a pre-attached interconnect, with the pre-attached interconnect attached to the interposer through via; mounting the pre-formed interposer over the integrated circuit and the conductive support with the pre-attached interconnect over the device through via; and forming an encapsulation over the substrate covering the integrated circuit, the conductive support, and partially covering the pre-formed interposer.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: April 12, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Chan Hoon Ko, Soo-San Park, YoungChul Kim