Abstract: A water treatment device using high voltage impulse is disclosed, the device including a high voltage impulse generator configured to generate a high voltage impulse by receiving an outside electric power source and operating in response to an outside control based on the applied outside electric power source, and a reactor configured to generate a reaction water by receiving the high voltage impulse from the high voltage impulse generator to process a source water.

Abstract: A highly integrated semiconductor device operates at a high speed due to low resistance at the gate electrode and minimal parasitic capacitance between the gate electrode and substrate. A gate pattern is formed on a substrate, and an insulating layer is formed over the substrate including over the gate pattern. The thickness of the insulating layer is reduced until the upper surface thereof beneath the level of the upper surface of the gate electrode. A conductive layer is then formed on the substrate, and is anisotropically etched to thereby form wings constituting a first spacer on upper sidewalls of the gate pattern. Then, the insulating layer is etched to leave a portion thereof beneath the wings. This remaining portion of the insulating layer constitutes a capacitance preventative layer that serves as a measure against the subsequent forming of a parasitic capacitor when source/drain electrodes are formed by implanting ions into the substrate and heat-treating the same.

Abstract: A highly integrated semiconductor device operates at a high speed due to low resistance at the gate electrode and minimal parasitic capacitance between the gate electrode and substrate. A gate pattern is formed on a substrate, and an insulating layer is formed over the substrate including over the gate pattern. The thickness of the insulating layer is reduced until the upper surface thereof beneath the level of the upper surface of the gate electrode. A conductive layer is then formed on the substrate, and is anisotropically etched to thereby form wings constituting a first spacer on upper sidewalls of the gate pattern. Then, the insulating layer is etched to leave a portion thereof beneath the wings. This remaining portion of the insulating layer constitutes a capacitance preventative layer that serves as a measure against the subsequent forming of a parasitic capacitor when source/drain electrodes are formed by implanting ions into the substrate and heat-treating the same.

Abstract: A residual gas removing device for a gas supply apparatus in a semiconductor fabricating facility, includes a low stress valve disposed between a mass flow controller and a chamber. The low stress valve alternately supplies or cuts off a gas from the mass flow controller to the chamber. A WF6 gas removing apparatus is in flow communication with a gas inlet line of the low stress valve to remove a residual WF6 gas in the gas inlet line, before proceeding with a subsequent deposition step.

Abstract: A highly integrated semiconductor device operates at a high speed due to low resistance at the gate electrode and minimal parasitic capacitance between the gate electrode and substrate. A gate pattern is formed on a substrate, and an insulating layer is formed over the substrate including over the gate pattern. The thickness of the insulating layer is reduced until the upper surface thereof beneath the level of the upper surface of the gate electrode. A conductive layer is then formed on the substrate, and is anisotropically etched to thereby form wings constituting a first spacer on upper sidewalls of the gate pattern. Then, the insulating layer is etched to leave a portion thereof beneath the wings. This remaining portion of the insulating layer constitutes a capacitance preventative layer that serves as a measure against the subsequent forming of a parasitic capacitor when source/drain electrodes are formed by implanting ions into the substrate and heat-treating the same.

Abstract: Self-contained semiconductor device manufacturing equipment has a small floor area so that it can be installed in limited space in a production line, and is highly functional so as to enhance the productivity of the line. The equipment has a plurality of working chambers arrayed in at least a vertical direction, a transfer chamber to which the working chambers are independently connected, and a robot disposed in the transfer chamber for positioning a wafer relative to and transferring the wafer between respective ones the working chambers.

Abstract: A residual gas removing device for a gas supply apparatus in a semiconductor fabricating facility, includes a low stress valve disposed between a mass flow controller and a chamber. The low stress valve alternately supplies or cuts off a gas from the mass flow controller to the chamber. A WF6 gas removing apparatus is in flow communication with a gas inlet line of the low stress valve to remove a residual WF6 gas in the gas inlet line, before proceeding with a subsequent deposition step.