Abstract: Provided is a wafer including a ring part and a processed part. The processed part is connected to the ring part. The processed part has a top surface which has been grounded and a bottom surface opposite to the top surface. The processed part is surrounded by the ring part. A region where the top surface connects to the ring part is a curved surface curved upwards.

Abstract: Provided is a wafer jig including a bottom wall and a ring-shaped side wall. The bottom wall has a supporting surface. The ring-shaped side wall is connected to a periphery of the bottom wall. The ring-shaped side wall includes at least two step portions. The two step portions include a first step portion and a second step portion. The first step portion is connected between the supporting surface and the second step portion, and the first step portion protrudes along a direction toward a center of the bottom wall. The ring-shaped side wall surrounds the center. In addition, a wafer structure and a wafer processing method are also provided.

Abstract: Provided is a wafer including a ring part and a processed part. The processed part is connected to the ring part. The processed part has a top surface which has been grounded and a bottom surface opposite to the top surface. The processed part is surrounded by the ring part. A region where the top surface connects to the ring part is a curved surface curved upwards.

Abstract: A silicon carbide (SiC) wafer and a positioning-edge processing method thereof are provided. The SiC wafer has a first flat and a second flat. A first rounded corner is respectively disposed at a connection between two ends of the first flat and an edge of the SiC wafer, wherein the first rounded corner has a radius of 1-10 mm. A second rounded corner is respectively disposed at a connection between two ends of the second flat and the edge of the SiC wafer, wherein the second rounded corner has a radius of 1-10 mm. Since the rounded corners at the connections between two ends of the flats and the wafer edges have optimum radii, the yield and quality of the wafer processing may be improved.