Abstract: An electronic device including a foldable housing including a first housing, a second housing, and a connection structure; a flexible display; a first plate including at least a portion disposed on a lower end of a first area of the display and a first periphery; a second plate including at least a portion disposed on a lower end of a second area of the display, and a second periphery; and a protection layer. When the electronic device is in an unfolded state, the first periphery and the second periphery are configured to be in contact with the display. When the electronic device pivots from the unfolded state to a folded state, the first periphery and the second periphery are configured to be spaced apart from the display, and the protection layer is configured to cover an area of the display exposed between the first periphery and the second periphery.

Abstract: A method for forming void-free, low contact-resistance damascene interconnects during a manufacturing process of an integrated circuit having both narrow and deep openings and wide and shallow openings on a same substrate features a two-step copper (Cu) deposition process, with a high-temperature rapid annealing process being conducted after the first deposition. After forming in a top surface a narrow and deep opening and a wide and shallow opening, a first copper (Cu) layer is deposited on a seed layer using a small-grained Cu material to completely fill the narrow and deep opening. After annealing the first Cu layer to reduce stress on the resulting structure, a second layer of large-grained Cu material is deposited on the annealed first Cu layer to fill the remainder of the openings. The resulting assembly, which requires no additional annealing, is then planarized to the original surface.

Abstract: A method for forming void-free, low contact-resistance damascene interconnects during a manufacturing process of an integrated circuit having both narrow and deep openings and wide and shallow openings on a same substrate features a two-step copper (Cu) deposition process, with a high-temperature rapid annealing process being conducted after the first deposition. After forming in a top surface a narrow and deep opening and a wide and shallow opening, a first copper (Cu) layer is deposited on a seed layer using a small-grained Cu material to completely fill the narrow and deep opening. After annealing the first Cu layer to reduce stress on the resulting structure, a second layer of large-grained Cu material is deposited on the annealed first Cu layer to fill the remainder of the openings. The resulting assembly, which requires no additional annealing, is then planarized to the original surface.