Abstract: A domed plasma reactor chamber uses an antenna driven by RF energy (LF, MF, or VHF) which is inductively coupled inside the reactor dome. The antenna generates a high density, low energy plasma inside the chamber for etching metals, dielectrics and semiconductor materials. Auxiliary RF bias energy applied to the wafer support cathode controls the cathode sheath voltage and controls the ion energy independent of density. Various magnetic and voltage processing enhancement techniques are disclosed, along with etch processes, deposition processes and combined etch/deposition processed. The disclosed invention provides processing of sensitive devices without damage and without microloading, thus providing increased yields.

Abstract: A method for high-density plasma etching. A substrate is provided. A material layer is formed on the substrate. A patterned photo-resist layer is formed on the oxide layer. The material layer is patterned by the high-density plasma etching, simultaneously, a formation of a barrier layer over the substrate with the patterning process is suppressed and nitrogen gas generated in the patterned photo-resist layer is reduced.

Abstract: A method for cleaning the surface of a semiconductor wafer is disclosed. A plasma ashing process is performed on the surface of the semiconductor wafer. The plasma ashing process is performed in a chamber that contains oxygen and carbon tetrafluoride (CF4). An ozone-containing deionized (DI) water cleaning procedure, an amine-based solvent cleaning procedure and a fluoride-based solvent cleaning procedure are then performed to clean the surface of the semiconductor wafer without over-etching the silicon oxide of the street. Finally, an oxygen plasma cleaning process is performed to remove any residual photo-resist.

Abstract: A method for controlling the critical dimension of a contact opening in a dielectric layer. A substrate has a dielectric layer formed thereon. A hard mask layer is formed over the dielectric layer. A photosensitive layer is formed over the hard mask layer. The photosensitive layer is patterned to expose a portion of the hard mask layer inside a desired contact opening region. A first etching operation is carried out to remove the hard mask layer within the contact opening region so that a portion of the dielectric layer is exposed. A second etching operation is carried out to remove the dielectric layer within the contact opening region, thereby forming the contact opening.

Abstract: A method of manufacturing metallic interconnects. A substrate has a copper line formed therein. An inter-metal dielectric layer is formed over the substrate and the copper line. A patterned photoresist layer is formed over the inter-metal dielectric layer. The inter-metal dielectric layer is etched to form a trench and a contact opening that exposes a portion of the copper line, wherein the contact opening is under the trench. At a low temperature and using a plasma derived from a gaseous mixture N2H2 (H2:4%)/O2, the photoresist layer is removed. Any copper oxide layer formed on the copper line in the process of removing photoresist material is reduced back to copper using gaseous N2H2 (H2:4%). A barrier layer conformal to the trench and the contact opening profile is formed. Copper is deposited to form a conformal first copper layer over the trench and the contact opening.

Abstract: A method described for removing a photoresist/polymers layer on a substrate. The method comprises the steps of providing a wafer having an oxide layer, a photoresist/polymers layer, an opening penetrating through the photoresist/polymers layer and the oxide layer, and the sidewall polymer on the surface of photoresist layer and the oxide layer. An in-situ plasma-etching step using an additional gas mixed with oxygen as source is performed to remove the photoresist/polymers layer without residues, no damages to substrate and oxide and no changes on the critical dimension of the opening during etching step.

Abstract: A domed plasma reactor chamber uses an antenna driven by RF energy (LF, MF, or VHF) which is inductively coupled inside the reactor dome. The antenna generates a high density, low energy plasma inside the chamber for etching metals, dielectrics and semiconductor materials. Auxiliary RF bias energy applied to the wafer support cathode controls the cathode sheath voltage and controls the ion energy independent of density. Various magnetic and voltage processing enhancement techniques are disclosed, along with etch processes, deposition processes and combined etch/deposition processed. The disclosed invention provides processing of sensitive devices without damage and without microloading, thus providing increased yields.

Abstract: A method for eliminating the etching microloading effect is proposed for the invention. Spirit of the invention is that a coating layer is formed on a photo-resist that covers a substrate before the substrate is etched, where coating layer maybe a polymer layer or a dielectric layer. Because step coverage of the coating layer is limited by the aspect of trench, for photo-resist it means the width of openings, it is indisputable that depth of coating layer on bottom of a narrow opening is smaller than depth of coating layer on bottom of a wide opening. Therefore, during following etching process, although etching microloading effect induces etching rate is higher in the wide opening and is lower in the narrow opening, but the thicker coating layer on bottom of the wide opening also requires larger etching time than the narrow opening. Consequently, it is crystal-clear that the etching microloading effect is cancelled and then depth of the wide trench is equal to depth of the narrow trench.

Abstract: The present invention provides a method of in-situ cleaning polymers from holes on a semiconductor wafer and in-situ removing the silicon nitride layer. The semiconductor wafer comprising a substrate, a silicon nitride (Si3N4) layer on the substrate, a silicon oxide (SiO2) layer on the silicon nitride layer, and a photo-resist layer on the silicon oxide layer. The silicon oxide layer and the photo-resist layer have a hole extending down to the silicon nitride layer. The hole contains polymer left after etching of the silicon oxide layer. The method comprises performing a in-situ plasma ashing process by injecting oxygen (O2) and argon (Ar) to completely remove the photo-resist layer and the polymer remaining within the hole. Subsequently, the silicon nitride layer was removed in the same chamber. The flow rate of O2 is maintained between 50˜2000 sccm (standard cubic centimeter per minute) and the flow rate of Ar is maintained between 50˜500 sccm.

Abstract: A method described for removing a photoresist/polymers layer on a substrate. The method comprises the steps of providing a wafer having an oxide layer, a photoresist/polymers layer, an opening penetrating through the photoresist/polymers layer and the oxide layer, and the sidewall polymer on the surface of photoresist layer and the oxide layer. An in-situ plasma-etching step using an additional gas mixed with oxygen as source is performed to remove the photoresist/polymers layer without residues, no damages to substrate and oxide and no changes on the critical dimension of the opening during etching step.

Abstract: A general method of the invention is to provide a polymer-hardening precursor piece (such as silicon, carbon, silicon carbide or silicon nitride, but preferably silicon) within the reactor chamber during an etch process with a fluoro-carbon or fluoro-hydrocarbon gas, and to heat the polymer-hardening precursor piece above the polymerization temperature sufficiently to achieve a desired increase in oxide-to-silicon etch selectivity. Generally, this polymer-hardening precursor or silicon piece may be an integral part of the reactor chamber walls and/or ceiling or a separate, expendable and quickly removable piece, and the heating/cooling apparatus may be of any suitable type including apparatus which conductively or remotely heats the silicon piece.

Abstract: A method and apparatus for depositing an etch stop layer. The method begins by introducing process gases into a processing chamber in which a substrate is disposed. An etch stop layer is then deposited over the substrate. An overlying layer is then deposited over the etch stop layer. The etch stop layer substantially protects underlying materials from the etchants used in patterning the overlying layer. Moreover, the etch stop layer also possesses advantageous optical characteristics, making it suitable for use as an antireflective coating in the patterning of layers underlying the etch stop layer.

Abstract: The present invention provides a method for etching a poly-silicon layer of a semiconductor wafer. The semiconductor wafer comprises a dielectric layer, a poly-silicon layer situated on the dielectric layer and containing dopants to a predetermined depth, and a photo-resist layer having a rectangular cross-section above a predetermined area of the poly-silicon layer. The semiconductor wafer is processed in a plasma chamber. A first dry-etching process is performed to vertically etch away the dopant-containing portion of the poly-silicon layer not covered by the photo-resist layer. Then, a second dry-etching process is performed to vertically etch away the residual portion of the poly-silicon layer not covered by the photo-resist layer down to the surface of the dielectric layer. The etching gases used in the first dry-etching process differ from those used in the second dry-etching process, and the main etching gas of the first dry-etching process is C2F6.

Abstract: A plasma etch process is described for the etching of oxide with a high selectivity to nitride, including nitride formed on uneven surfaces of a substrate, e.g., on sidewalls of steps on an integrated circuit structure. The addition of one or more hydrogen-containing gases, preferably one or more hydrofluorocarbon gases, to one or more fluorine-substituted hydrocarbon etch gases and a scavenger for fluorine, in a plasma etch process for etching oxide in preference to nitride, results in a high selectivity to nitride which is preserved regardless of the topography of the nitride portions of the substrate surface. In a preferred embodiment, one or more oxygen-bearing gases are also added to reduce the overall rate of polymer deposition on the chamber surfaces and on the surfaces to be etched, which can otherwise reduce the etch rate and cause excessive polymer deposition on the chamber surfaces. The fluorine scavenger is preferably an electrically grounded silicon electrode associated with the plasma.

Abstract: A simplified method is disclosed for etching low k organic dielectric film. A substrate is provided with a hardmask layer and low k organic dielectric layer formed thereon in which hardmask layer is on the dielectric layer. A layer of photoresist is formed on the hardmask layer and imaged with a pattern by exposure through a dark field mask. As a key step, the pattern is transferred into the hardmask layer by dry etching and then the photoresist is stripped in-situ. Then, the interconnect is formed by using dry etching the low k organic dielectric layer using the hardmask layer as a mask, and readying it for the next semiconductor process.

Abstract: A method for forming a high aspect ration (HAR>4:1) borderless contact hole is described. The method forms a contact/via hole in the silicon oxide layer by performing an etching process with an etchant, C4F8/C2F6,/Ar/CO or C4F8/Ar/CO, on an etcher. The etcher includes a ring, a roof, a chiller and a chamber. The etchant used in the etching process is controlled under conditions including a C4F8 flow of about 10 to 20 sccm, a CO flow of about 1 to 100 sccm, and an Ar flow of about 100 to 500 sccm. The flow of C2F6 is about 0.5 to 1.5 times that of C4F8. The conditions of the etcher include a roof temperature of about 150 to 300° C., a chiller temperature of about −20 to 20° C., a wall temperature of about 150 to 400° C., a ring temperature of about 150 to 400° C., and a pressure within the chamber of about 4 to 50 mtorr. By controlling the chamber pressure and the deposition rate of the polymer molecules, a properly profiled contact hole is obtained.

Abstract: A plasma etch process is described for the etching of oxide with a high selectivity to nitride, including nitride formed on uneven surfaces of a substrate, e.g., on sidewalls of steps on an integrated circuit structure. The addition of a hydrogen-bearing gas to C4F8 or C2F6 etch gases and a scavenger for fluorine, in a plasma etch process for etching oxide in preference to nitride, results in a high selectivity to nitride which is preserved regardless of the topography of the nitride portions of the substrate surface.

Abstract: A method for forming a contact hole in a silicon oxide layer formed over a silicon nitride layer and a substrate performs an etching process with an etchant, C4F8/Ar or C4F8/C2F6/Ar, on an inductively coupled plasma etcher. The inductively coupled plasma etcher contains a chamber, a ring, and a roof. The etchant used in the etching process is controlled by conditions that include a C4F8 flow of about 10 to 20 sccm, a CO flow of less than about 100 sccm, and an Ar flow of about 50 to 500 sccm. In the meantime, the conditions of the inductively coupled plasma etcher include a roof temperature of about 150 to 300 ° C., a ring temperature of about 150 to 400 ° C., and a pressure within the chamber of about 4 to 50 mtorr. By performing a plasma etching process under the foregoing conditions, a properly profiled contact hole is obtained.

Abstract: A plasma etch process for oxide having high selectivity to silicon is disclosed comprising the use of a mixture of SiF4 and one or more other fluorine-containing etch gases in an etch chamber maintained within a pressure range of from about 1 milliTorr to about 200 milliTorr. Preferably, the etch chamber also contains an exposed silicon surface. The plasma may be generated by a capacitive discharge type plasma generator, if pressures of at least about 50 milliTorr are used, but preferably the plasma is generated by an electromagnetically coupled plasma generator. The high selectivity exhibited by the etch process of the invention permits use of an electromagnetically coupled plasma generator which, in turn, permits operation of the etch process at reduced pressures of preferably from about 1 milliTorr to about 30 milliTorr resulting in the etching of vertical sidewall openings in the oxide layer.

Abstract: The present invention relates to a method of plasma etching and a method of operating a plasma etching apparatus.