Abstract: A method for predicting a reactant molecule including performing feature extraction on a product molecule to obtain a feature of the product molecule, predicting, based on the feature of the product molecule, a conversion path between the product molecule and a plurality of reactant molecules using a reverse reaction prediction model, editing an edited object indicated by each editing action based on an edited state indicated by each editing action in the editing sequence to obtain a plurality of synthons corresponding to the product molecule, and adding, for each synthon, a motif indicated by each synthon completion action based on at least one synthon completion action corresponding to each synthon in the synthon completion sequence and an interface atom indicated by each synthon completion action in the at least one synthon completion action to obtain a plurality of reactant molecules corresponding to the plurality of synthons.

Abstract: A strap tip structure includes a positioning fastener member and an outer cover. The positioning fastener member includes a mainbody, at least three clip members and an external screw structure. The at least three clip members are flexibly connected to the mainbody, and each of the clip members is an arc plate and has an end portion. The external screw structure is disposed on an outer surface of the mainbody. The outer cover is detachably connected to the positioning fastener member. The outer cover includes an inner space and an inner screw structure, and the inner screw structure matches the external screw structure. When the inner screw structure of the outer cover and the external screw structure of the positioning fastener member are screwed together, the positioning fastener member is accommodated in the inner space.

Abstract: A buckle device includes a female buckle and a male buckle. The female buckle includes a wall forming an inserting hole. The male buckle includes a male buckle body, two engaging portions, an elastic connecting element and an actuating element. The two engaging portions are disposed at the male buckle body in intervals and located at an inserting side of the male buckle body, and the two engaging portions are configured to engage with the inserting hole of the female buckle. The elastic connecting element is connected between the two engaging portions. The actuating element includes an actuating portion and a connecting string. One of two ends of the connecting string is connected to the actuating portion, and the other one of the two ends of the connecting string is connected to the elastic connecting element.

Abstract: A strap tip structure includes a positioning fastener member and an outer cover. The positioning fastener member includes a mainbody, at least three clip members and an external screw structure. The at least three clip members are flexibly connected to the mainbody, and each of the clip members is an arc plate and has an end portion. The external screw structure is disposed on an outer surface of the mainbody. The outer cover is detachably connected to the positioning fastener member. The outer cover includes an inner space and an inner screw structure, and the inner screw structure matches the external screw structure. When the inner screw structure of the outer cover and the external screw structure of the positioning fastener member are screwed together, the positioning fastener member is accommodated in the inner space.

Abstract: A method for predicting retrosynthesis of a compound molecule and a related apparatus. The method includes: obtaining a target molecule and determining the target molecule as a root node in a tree structure, then, expanding the first leaf node through a target retrosynthesis model to obtain a plurality of second leaf nodes, further, recursively processing the predicted molecule set corresponding to the second leaf nodes and determining a terminal node that satisfies a preset condition; and then, traversing path information corresponding to the terminal node to determine a retrosynthetic path of the target molecule. In this way, a retrosynthesis prediction process of a multi-step reaction is realized. Leaf nodes are gradually recursively expanded and screened, to ensure the reliability of reactants determined by the retrosynthesis prediction process of the multi-step reaction, thereby improving the accuracy of prediction of retrosynthesis of compound molecules.

Abstract: A method of fabricating a poly-crystalline silicon ingot includes: (a) loading a nucleation promotion layer onto a bottom of a mold; (b) providing a silicon source on the nucleation promotion layer in the mold; (c) heating the mold until the silicon source is melted into a silicon melt completely; (d) controlling at least one thermal control parameter regarding the silicon melt continually to enable the silicon melt to nucleate on the nucleation promotion layer such that a plurality of silicon grains grow in the vertical direction; (e) controlling the at least one thermal control parameter to enable the plurality of the silicon grains to continuously grow with an average grain size increasing progressively in the vertical direction until entirety of the silicon melt is solidified to obtain the poly-crystalline silicon ingot, wherein the nucleation promotion layer is loaded by spreading a plurality of mono-Si particles over the bottom of the mold.

Abstract: A poly-crystalline silicon ingot having a bottom and defining a vertical direction includes a plurality of silicon grains grown in the vertical direction, in which the plurality of the silicon grains have at least three crystal orientations; and a nucleation promotion layer comprising a plurality of chips and chunks of poly-crystalline silicon on the bottom, wherein the poly-crystalline silicon ingot has a defect density at a height ranging from about 150 mm to about 250 mm of the poly-crystalline silicon ingot that is less than 15%.

Abstract: A poly-crystalline silicon ingot having a bottom and defining a vertical direction includes a plurality of silicon grains grown in the vertical direction, in which the plurality of the silicon grains have at least three crystal orientations; and a nucleation promotion layer comprising a plurality of chips and chunks of poly-crystalline silicon on the bottom, wherein the poly-crystalline silicon ingot has a defect density at a height ranging from about 150 mm to about 250 mm of the poly-crystalline silicon ingot that is less than 15%.

Abstract: A crystalline silicon ingot and a method of fabricating the same are provided. The method utilizes a nucleation promotion layer to facilitate a plurality of silicon grains to nucleate on the nucleation promotion layer from a silicon melt and grow in a vertical direction into silicon grains until the silicon melt is completely solidified. The increment rate of defect density in the silicon ingot along the vertical direction has a range of 0.01%/mm˜10%/mm.

Abstract: A method of fabricating a poly-crystalline silicon ingot includes: (a) loading a nucleation promotion layer onto a bottom of a mold; (b) providing a silicon source on the nucleation promotion layer in the mold; (c) heating the mold until the silicon source is melted into a silicon melt completely; (d) controlling at least one thermal control parameter regarding the silicon melt continually to enable the silicon melt to nucleate on the nucleation promotion layer such that a plurality of silicon grains grow in the vertical direction; (e) controlling the at least one thermal control parameter to enable the plurality of the silicon grains to continuously grow with an average grain size increasing progressively in the vertical direction until entirety of the silicon melt is solidified to obtain the poly-crystalline silicon ingot, wherein the nucleation promotion layer is loaded by spreading a plurality of mono-Si particles over the bottom of the mold.

Abstract: A crystalline silicon ingot and a method of fabricating the same are provided. The method utilizes a nucleation promotion layer to facilitate a plurality of silicon grains to nucleate on the nucleation promotion layer from a silicon melt and grow in a vertical direction into silicon grains until the silicon melt is completely solidified. The increment rate of defect density in the silicon ingot along the vertical direction has a range of 0.01%/mm˜10%/mm.

Abstract: The present disclosure provides an integrated circuit design method. In an example, a method includes receiving an integrated circuit design layout that includes an active region feature, a contact feature, and an isolation feature, wherein a portion of the active region feature is disposed between the contact feature and the isolation feature; determining whether a thickness of the portion of the active region feature disposed between the contact feature and the isolation feature is less than a threshold value; and modifying the integrated circuit design layout if the thickness is less than the threshold value, wherein the modifying includes adding a supplementary active region feature adjacent to the portion of the active region feature disposed between the contact feature and the isolation feature.

Abstract: A crystalline silicon ingot and a method of fabricating the same are provided. The method utilizes a nucleation promotion layer to facilitate a plurality of silicon grains to nucleate on the nucleation promotion layer from a silicon melt and grow in a vertical direction into silicon grains until the silicon melt is completely solidified. The increment rate of defect density in the silicon ingot along the vertical direction has a range of 0.01%/mm˜10%/mm.

Abstract: The present disclosure provides an integrated circuit design method. In an example, a method includes receiving an integrated circuit design layout that includes an active region feature, a contact feature, and an isolation feature, wherein a portion of the active region feature is disposed between the contact feature and the isolation feature; determining whether a thickness of the portion of the active region feature disposed between the contact feature and the isolation feature is less than a threshold value; and modifying the integrated circuit design layout if the thickness is less than the threshold value, wherein the modifying includes adding a supplementary active region feature adjacent to the portion of the active region feature disposed between the contact feature and the isolation feature.

Abstract: The present disclosure provides an integrated circuit design method. In an example, a method includes receiving an integrated circuit design layout that includes an active region feature, a contact feature, and an isolation feature, wherein a portion of the active region feature is disposed between the contact feature and the isolation feature; determining whether a thickness of the portion of the active region feature disposed between the contact feature and the isolation feature is less than a threshold value; and modifying the integrated circuit design layout if the thickness is less than the threshold value, wherein the modifying includes adding a supplementary active region feature adjacent to the portion of the active region feature disposed between the contact feature and the isolation feature.

Abstract: A crystalline silicon ingot and a method of fabricating the same are provided. The method utilizes a nucleation promotion layer to facilitate a plurality of silicon grains to nucleate on the nucleation promotion layer from a silicon melt and grow in a vertical direction into silicon grains until the silicon melt is completely solidified. The increment rate of defect density in the silicon ingot along the vertical direction has a range of 0.01%/mm˜10%/mm.

Abstract: The present disclosure provides an integrated circuit design method. In an example, a method includes receiving an integrated circuit design layout that includes an active region feature, a contact feature, and an isolation feature, wherein a portion of the active region feature is disposed between the contact feature and the isolation feature; determining whether a thickness of the portion of the active region feature disposed between the contact feature and the isolation feature is less than a threshold value; and modifying the integrated circuit design layout if the thickness is less than the threshold value, wherein the modifying includes adding a supplementary active region feature adjacent to the portion of the active region feature disposed between the contact feature and the isolation feature.

Abstract: A retaining ring for CMP is disclosed. The retaining ring has a plurality of grooves. The grooves have rounded sidewalls. Because the sidewalls of the grooves of the retaining ring are rounded, the slurry is not apt to accumulate around them and the pad is less scratched. Accordingly, the micro-scratches on the wafer surface are reduced and the yield of the CMP step is increased. Its operational method and application system are also disclosed in this invention.

Abstract: A method of removing an insulating layer on a substrate is described, including a first CMP process and a second CMP process performed in sequence, wherein the polishing slurry used in the first CMP process and that used in the second CMP process have substantially the same pH value that exceeds 7.0. A cleaning step is conducted between the first and the second CMP processes to remove a specific substance which would otherwise cause undesired particles to form in the second CMP process.

Abstract: A solution for fixed abrasive chemical mechanical polishing process including a protection constituent, a hydrolysis constituent and water is described. The protection constituent is used to protect a silicon nitride and its concentration is between 0.001 wt % and 10 wt %. The hydrolysis constituent is used to hydrolyze a silicon oxide and its concentration is between 0.001 wt % and 10 wt %. The concentration ofthe water is between 80 wt % and 99.998 wt %.