Patents by Inventor Chan Min Lee
Chan Min Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240132021Abstract: An apparatus for controlling a discharge pressure of a fluid includes: a pump configured to suck the fluid through an inlet or to discharge the sucked fluid through an outlet; a distributor connected to the pump and to an injection nozzle provided by a sensor and configured to distribute the fluid discharged from the pump to the sensor; and a controller. The controller is configured to control the pump to operate selectively in accordance with detection of contamination of the sensor and to control operation of the distributor to be forcibly delayed during operation of the pump such that the fluid distributed to the sensor, when detected as being contaminated, is controlled to reach a selected required discharge pressure of different required discharge pressures selected in accordance with water amount information and a degree of contamination of the sensor.Type: ApplicationFiled: April 30, 2023Publication date: April 25, 2024Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION, DY AUTO CORPORATIONInventors: Young Joon Shin, Chan Mook Choi, Gyu Won Han, Jong Min Park, Jin Hee Lee, Jong Wook Lee, Min Wook Park, Seong Jun Kim, Hyeong Jun Kim, Sun Ju Kim
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Publication number: 20240131903Abstract: One exemplary embodiment of the present invention relates to a thermal management fluid module for a vehicle using a circulating fluid such as a refrigerant or a coolant, the thermal management fluid module including a manifold plate in which a plurality of fluid flow channels are formed, and a thermal interference avoidance unit which is coupled to the manifold plate and in which fluid flow channels having a relatively high temperature or low temperature are formed to be separated and spaced apart from other fluid flow channels among the fluid flow channels.Type: ApplicationFiled: October 17, 2023Publication date: April 25, 2024Inventors: In Keun KANG, Young Man KIM, Kyeong Cheol LEE, Jae Min LEE, Chan Jin LEE
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Publication number: 20240123793Abstract: A vehicular air conditioning system includes a compressor configured to compress a gaseous refrigerant to have a high temperature and a high pressure while an output rotation speed thereof is variably controlled according to a cooling load in a vehicle interior, and a compressor performance deterioration determination part configured to determine whether or not the performance of the compressor has deteriorated according to the magnitude of a difference between an amount of work (W) of the compressor and an amount of power consumption (kW) of the compressor.Type: ApplicationFiled: April 26, 2022Publication date: April 18, 2024Inventors: Jun Min LEE, Yong Sik KIM, Chan Young LEE, Joong Man HAN
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Patent number: 11960319Abstract: A memory device is provided. The memory device comprises an internal clock generator configured to receive an external clock signal from a host and generate an internal clock signal in accordance with a chip enable signal, an internal enable signal generator configured to operate based on the internal clock signal and receive an external enable signal from the host and generate an internal enable signal, and a monitoring signal generator configured to output a monitoring signal that is generated based on at least one of the internal clock signal or the internal enable signal to the host.Type: GrantFiled: February 23, 2022Date of Patent: April 16, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Tae Min Choi, Chan Ho Lee, Jung Hak Song, Ju Chang Lee, Woo Jin Jung
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Publication number: 20240108059Abstract: An aerosol generating article includes: a first segment impregnated with a first liquid composition; a second segment impregnated with a second liquid composition that is different from the first liquid composition; a cooler configured to cool aerosol by allowing the aerosol, generated from the first segment or the second segment, to pass through the cooler; and a filter configured to filter the aerosol by allowing the aerosol having passed through the cooler to pass through the filter, wherein at least a portion of the filter is recessed to thereby form a cavity in the filter.Type: ApplicationFiled: October 18, 2021Publication date: April 4, 2024Applicant: KT&G CORPORATIONInventors: Tae Kyung LEE, Chan Min KWON, Sun Hwan JUNG
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Publication number: 20240109858Abstract: The present invention relates to a compound capable of lowering the flammability of a non-aqueous electrolyte when included in the non-aqueous electrolyte and improving the life properties of a battery by forming an electrode-electrolyte interface which is stable at high temperatures and low in resistance, and relates to a compound represented by Formula I descried herein, a non-aqueous electrolyte solution and a lithium secondary battery both including the compound, n, m, Ak, and X are described herein.Type: ApplicationFiled: March 23, 2022Publication date: April 4, 2024Applicants: LG Chem, Ltd., LG Energy Solution, Ltd.Inventors: Jung Keun Kim, Su Jeong Kim, Mi Sook Lee, Won Kyun Lee, Duk Hun Jang, Jeong Ae Yoon, Kyoung Hoon Kim, Chul Haeng Lee, Mi Yeon Oh, Kil Sun Lee, Jung Min Lee, Esder Kang, Chan Woo Noh, Chul Eun Yeom
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Publication number: 20240092148Abstract: Vehicular air conditioning system improving the ease of assembly and the maintainability of a photocatalyst module by structural improvement of an intake case and suppressing an air vortex generated at the air intake side during air intake process in a blower and a rumbling noise caused by the air vortex. The vehicular air conditioning system includes an intake part configured to suck indoor or outdoor air and blow air into a vehicle interior, a photocatalyst module purifying the air by emitting superoxide radicals toward the air blown into the vehicle interior from the intake part, which is installed on a downstream outer surface portion of a blower casing of the intake part, and an interference avoidance groove for avoiding interference with the photocatalyst module is formed on an outer surface portion of the intake case corresponding to the periphery of the photocatalyst module installed in the blower casing.Type: ApplicationFiled: August 8, 2022Publication date: March 21, 2024Inventors: Chan Young LEE, Sung Jin KIM, Young In KIM, Jun Min LEE
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Patent number: 11923035Abstract: A pseudo dual port memory device in which an operating speed is improved and stability is increased is provided. The pseudo dual port memory device may include a memory cell, a pair of bit lines connected to the memory cell, a write driver, a sense amp, and a column multiplexer which is connected to the bit lines, receives a write multiplexer control signal and a read multiplexer control signal, connects the bit lines to the write driver in response to the write multiplexer control signal, and connects the bit lines to the sense amp in response to the read multiplexer control signal. A precharge control signal generation circuit which is connected to the column multiplexer may generate a precharge control signal on the basis of the read and write multiplexer control signals, and a bit line precharge circuit may precharge the bit lines based on the precharge control signal.Type: GrantFiled: February 10, 2022Date of Patent: March 5, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Chan Ho Lee, Tae Min Choi, Jeong Kyun Kim, Hyeong Cheol Kim, Suk Youn, Ju Chang Lee, Kyu Won Choi
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Patent number: 11398485Abstract: A semiconductor memory device includes a substrate having a cell region and a contact region with a peripheral circuit region, first and second stacks on the cell region, and a first peripheral transistor on the peripheral circuit region. Each of the first and second stacks includes semiconductor patterns stacked, in a vertical direction, on the cell region, bit lines stacked in the vertical direction on the cell region and respectively connected to first ends of the semiconductor patterns, each of the bit lines extending, in a horizontal direction with respect to the upper surface of the substrate, from the cell region to the contact region, and a word line disposed adjacent to the semiconductor patterns and extending in the vertical direction from the cell region of the substrate. The first peripheral transistor is disposed between the bit lines of the first stack and the bit lines of the second stack.Type: GrantFiled: March 30, 2020Date of Patent: July 26, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dongsuk Shin, Jiyoung Kim, Hokyun An, Chan Min Lee, Eunju Cho, Hui-Jung Kim, Joongchan Shin, Taehyun An, Hyungeun Choi, Yoosang Hwang, Kiseok Lee
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Publication number: 20210057419Abstract: A semiconductor memory device includes a substrate having a cell region and a contact region with a peripheral circuit region, first and second stacks on the cell region, and a first peripheral transistor on the peripheral circuit region. Each of the first and second stacks includes semiconductor patterns stacked, in a vertical direction, on the cell region, bit lines stacked in the vertical direction on the cell region and respectively connected to first ends of the semiconductor patterns, each of the bit lines extending, in a horizontal direction with respect to the upper surface of the substrate, from the cell region to the contact region, and a word line disposed adjacent to the semiconductor patterns and extending in the vertical direction from the cell region of the substrate. The first peripheral transistor is disposed between the bit lines of the first stack and the bit lines of the second stack.Type: ApplicationFiled: March 30, 2020Publication date: February 25, 2021Inventors: DONGSUK SHIN, JIYOUNG KIM, HOKYUN AN, CHAN MIN LEE, EUNJU CHO, HUI-JUNG KIM, JOONGCHAN SHIN, TAEHYUN AN, HYUNGEUN CHOI, YOOSANG HWANG, KISEOK LEE
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Patent number: 9947668Abstract: Semiconductor devices, and methods for forming the same, include forming a first wiring film and an etching buffer film in a cell array region and a peripheral circuit region of a substrate, and forming a contact hole by selectively etching the etching buffer film and the first wiring film so as to expose an active region of the cell array region and at least a part of a field isolation region adjacent thereto. A bit line contact is formed in the contact hole to be in contact with the active region, and a second wiring film is formed over the substrate. By patterning the second wiring film, the bit line contact, the etching buffer film, and the first wiring film, a bit line is formed in the cell array region and a peripheral gate is formed in the peripheral circuit region.Type: GrantFiled: January 7, 2015Date of Patent: April 17, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Dongjin Lee, Sungho Jang, Jiyoung Kim, Kang-Uk Kim, Chan Min Lee, Juyeon Jang
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Patent number: 9496381Abstract: A semiconductor device may include a substrate including an active pattern delimited by a device isolation pattern, a gate electrode crossing the active pattern, a first impurity region and a second impurity region in the active pattern on both sides of the gate electrode, a bit line crossing the gate electrode, a first contact electrically connecting the first impurity region with the bit line, and a first nitride pattern on a lower side surface of the first contact. A width of the first contact measured perpendicular to an extending direction of the bit line may be substantially equal to that of the bit line.Type: GrantFiled: December 17, 2012Date of Patent: November 15, 2016Assignee: SAMSUNG ELECTTONICS CO., LTD.Inventors: Mongsup Lee, Yoonho Son, Woogwan Shim, Chan Min Lee, Inseak Hwang
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Publication number: 20150303201Abstract: Semiconductor devices, and methods for forming the same, include forming a first wiring film and an etching buffer film in a cell array region and a peripheral circuit region of a substrate, and forming a contact hole by selectively etching the etching buffer film and the first wiring film so as to expose an active region of the cell array region and at least a part of a field isolation region adjacent thereto. A bit line contact is formed in the contact hole to be in contact with the active region, and a second wiring film is formed over the substrate. By patterning the second wiring film, the bit line contact, the etching buffer film, and the first wiring film, a bit line is formed in the cell array region and a peripheral gate is formed in the peripheral circuit region.Type: ApplicationFiled: January 7, 2015Publication date: October 22, 2015Inventors: Dongjin LEE, Sungho JANG, Jiyoung KIM, Kang-Uk KIM, Chan Min LEE, Juyeon JANG
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Patent number: 9054296Abstract: A semiconductor device includes a conductive line, a diode on the conductive line, one or more insulating patterns adjacent to diode, and a data storage region coupled to the diode. An upper surface of the diode is between the one or more insulating patterns and the data storage region. The data storage region may include a phase-change region, and the diode may taper in width between two insulating patterns in one arrangement.Type: GrantFiled: December 4, 2013Date of Patent: June 9, 2015Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sea-Phyo Kim, Dong-Bok Lee, Chan-Min Lee
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Publication number: 20140183435Abstract: A semiconductor device includes a conductive line, a diode on the conductive line, one or more insulating patterns adjacent to diode, and a data storage region coupled to the diode. An upper surface of the diode is between the one or more insulating patterns and the data storage region. The data storage region may include a phase-change region, and the diode may taper in width between two insulating patterns in one arrangement.Type: ApplicationFiled: December 4, 2013Publication date: July 3, 2014Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sea-Phyo KIM, Dong-Bok LEE, Chan-Min LEE
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Publication number: 20130240959Abstract: A semiconductor device may include a substrate including an active pattern delimited by a device isolation pattern, a gate electrode crossing the active pattern, a first impurity region and a second impurity region in the active pattern on both sides of the gate electrode, a bit line crossing the gate electrode, a first contact electrically connecting the first impurity region with the bit line, and a first nitride pattern on a lower side surface of the first contact. A width of the first contact measured perpendicular to an extending direction of the bit line may be substantially equal to that of the bit line.Type: ApplicationFiled: December 17, 2012Publication date: September 19, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Mongsup LEE, Yoonho SON, Woogwan SHIM, Chan Min LEE, Inseak HWANG
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Publication number: 20130056823Abstract: A device isolation layer is formed in a substrate to define spaced-apart linear active regions in the substrate. Buried gate patterns are formed in the substrate and extending along a first direction to cross the active regions. An etch stop layer and a first insulating layer are formed on the substrate. Bit line structures are formed on the first insulating layer and extending along a second direction transverse to the first direction to cross the active regions. A second insulating layer is formed on the bit line structures. Contact plugs are formed penetrating the second insulating layer, the first insulating layer, and the etch stop layer to contact one of the active regions between adjacent ones of the bit line structures.Type: ApplicationFiled: September 4, 2012Publication date: March 7, 2013Inventors: Yoonjae Kim, Nam-Gun Kim, Chulho Shin, Chan Min Lee