Abstract: Contaminants are generated during etching processes for forming electrodes of storage capacitors for very high density future memory cells, such as ferroelectric random access memory (FeRAM) cells. These contaminants include significant quantities of noble metals, and in particular iridium and iridium compound particulates. In order to prevent undesirable iridium and iridium compound particulates from adversely affecting subsequent etching processes performed in the chamber, the plasma metal etch chamber is seasoned by exposing interior surfaces of the chamber to a seasoning plasma generated from a gas mixture comprising at least two gases selected from the group consisting of BCl3, HBr, and CF4. The chamber seasoning method of the invention is also applicable to etch processes involving other noble metals, such as platinum.

Abstract: Nonvolatile etch byproduct contaminants are generated during etching processes for forming electrodes of storage capacitors for very high density future memory cells, such as ferroelectric random access memory (FeRAM) cells. These contaminants include significant quantities of metals and metal compounds. In order to prevent undesirable metal etch byproduct particulates from adversely affecting subsequent etching processes performed in the chamber, the plasma metal etch chamber is seasoned by placing a substrate in the chamber, then exposing the substrate and interior surfaces of the chamber to a seasoning plasma generated from a source gas that includes at least one principal etchant gas used during an etch process which produced the nonvolatile etch byproducts. The method is performed at a substrate temperature that is equal to or greater than a substrate temperature at which the nonvolatile etch byproducts were produced.

Abstract: Contaminants are generated during etching processes for forming electrodes of storage capacitors for very high density future memory cells, such as ferroelectric random access memory (FeRAM) cells. These contaminants include significant quantities of noble metals, and in particular iridium and iridium compound particulates. In order to prevent undesirable iridium and iridium compound particulates from adversely affecting subsequent etching processes performed in the chamber, the plasma metal etch chamber is seasoned by exposing interior surfaces of the chamber to a seasoning plasma generated from a gas mixture comprising at least two gases selected from the group consisting of BCl3, HBr, and CF4. The chamber seasoning method of the invention is also applicable to etch processes involving other noble metals, such as platinum.

Abstract: A self aligned contact pad in a semiconductor device and a method for forming the self aligned contact pad are disclosed. A bit line contact pad and a storage node contact pad are simultaneously formed by using a photoresist layer pattern having a T-shaped opening including at least two contact regions. An etch stopping layer is formed over a semiconductor substrate and over a transistor. An interlayer dielectric layer is then formed over the etch stopping layer. Next, the interlayer dielectric layer is planarized to have a planar top surface. A mask pattern having a T-shaped opening is then formed over the interlayer dielectric layer, exposing the active region and a portion of the inactive region. The interlayer dielectric layer and etch stopping layer are sequentially etched to reveal a top surface of the semiconductor substrate using the mask pattern, thereby forming a self aligned contact opening exposing a top surface of the semiconductor substrate. The mask pattern is then removed.

Abstract: A method for forming a gate structure on a semiconductor substrate includes the following steps. A layer of a gate material is formed on the semiconductor substrate, and a patterned mask layer is formed on the layer of the gate material opposite the substrate. The layer of the gate material is then etched with an etching gas including a mixture of chlorine gas (Cl.sub.2), oxygen gas (O.sub.2), and a gas including fluorine (F) using the patterned mask layer as an etching mask. In particular, the step of forming the layer of the gate material can include the steps of forming a polysilicon layer on a surface of the semiconductor substrate, and forming a silicide layer on the polysilicon layer opposite the substrate.

Abstract: A method for forming a gate structure on a semiconductor substrate includes the following steps. A layer of a gate material is formed on the semiconductor substrate, and a patterned mask layer is formed on the layer of the gate material opposite the substrate. The layer of the gate material is then etched with an etching gas including a mixture of chlorine gas (Cl.sub.2) and oxygen gas (O.sub.2) using the patterned mask layer as an etching mask. In particular, the step of forming the layer of the gate material can include the steps of forming a polysilicon layer on a surface of the semiconductor substrate, and forming a silicide layer on the polysilicon layer opposite the substrate.

Abstract: A spectroscopic analyzing method and apparatus for a wafer surface and gas phase elements in a reaction chamber. A beam of radiant energy is introduced from a light incident apparatus to the reaction chamber through a window on a wall of the reaction chamber at a predetermined, but variable, angle of incidence. The angle of incidence is set by adjusting optical elements in the light incident apparatus and an angle of the window. At one angle of incidence, the beam of radiant energy is caused to interact with gas-phase elements in the reaction chamber for spectroscopic analysis. At another angle of incidence, the beam of radiant energy is caused to interact with the wafer surface for spectroscopic analysis.