Patents by Inventor Chan-Syun Yang

Chan-Syun Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8901665
    Abstract: The present disclosure provides a method of semiconductor fabrication including forming an inter-layer dielectric (ILD) layer on a semiconductor substrate. The ILD layer has an opening defined by sidewalls of the ILD layer. A spacer element is formed on the sidewalls of the ILD layer. A gate structure is formed in the opening adjacent the spacer element. In an embodiment, the sidewall spacer also for a decrease in the dimensions (e.g., length) of the gate structure formed in the opening.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: December 2, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Andrew Joseph Kelly, Pei-Shan Chien, Yung-Ta Li, Chan Syun Yang
  • Publication number: 20130161762
    Abstract: The present disclosure provides a method of semiconductor fabrication including forming an inter-layer dielectric (ILD) layer on a semiconductor substrate. The ILD layer has an opening defined by sidewalls of the ILD layer. A spacer element is formed on the sidewalls of the ILD layer. A gate structure is formed in the opening adjacent the spacer element. In an embodiment, the sidewall spacer also for a decrease in the dimensions (e.g., length) of the gate structure formed in the opening.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 27, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd., ("TSMC")
    Inventors: Andrew Joseph Kelly, Pei-Shan Chien, Yung-Ta Li, Chan Syun Yang
  • Patent number: 7807579
    Abstract: An oxygen-free hydrogen plasma ashing process particularly useful for low-k dielectric materials based on hydrogenated silicon oxycarbide materials. The main ashing step includes exposing a previously etched dielectric layer to a plasma of hydrogen and optional nitrogen, a larger amount of water vapor, and a yet larger amount of argon or helium. Especially for porous low-k dielectrics, the main ashing plasma additionally contains a hydrocarbon gas such as methane. The main ashing may be preceded by a short surface treatment by a plasma of a hydrogen-containing reducing gas such as hydrogen and optional nitrogen.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: October 5, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Chan-Syun Yang, Changhun Lee
  • Publication number: 20080261405
    Abstract: An oxygen-free hydrogen plasma ashing process particularly useful for low-k dielectric materials based on hydrogenated silicon oxycarbide materials. The main ashing step includes exposing a previously etched dielectric layer to a plasma of hydrogen and optional nitrogen, a larger amount of water vapor, and a yet larger amount of argon or helium. Especially for porous low-k dielectrics, the main ashing plasma additionally contains a hydrocarbon gas such as methane. The main ashing may be preceded by a short surface treatment by a plasma of a hydrogen-containing reducing gas such as hydrogen and optional nitrogen.
    Type: Application
    Filed: April 19, 2007
    Publication date: October 23, 2008
    Applicant: Applied Materials, Inc.
    Inventors: Chan-Syun Yang, Changhun Lee
  • Publication number: 20040077178
    Abstract: A method for laterally etching a structure on a semiconductor substrate comprising depositing a protective mask that thins towards a bottom of the structure and lateral etching a wall of the structure to form a notch or to release the structure.
    Type: Application
    Filed: October 17, 2002
    Publication date: April 22, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Chan-Syun Yang, Anisul H. Khan, Ajay Kumar, Padmapani C. Nallan
  • Publication number: 20040018647
    Abstract: A method and apparatus for controlling lateral etching during an etching process. The method and apparatus includes laterally etching a lower layer of a stack of layers in a processing chamber, where an endpoint detection system radiates a spectrum of light over the lower layer being etched and an area over the stack of layers proximate to the lower layer being etched. The intensity of light reflected from at least one of the stacked layers positioned lateral to the lower layer being etched is then measured. An endpoint detection system terminates the etching process upon measuring a predetermined metric associated with the intensity of reflected light from the at least one of the stacked layers.
    Type: Application
    Filed: February 24, 2003
    Publication date: January 29, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Steven J. Jones, Shashank C. Deshmukh, Matthew F. Davis, Lei Lian, Chan-Syun Yang