Patents by Inventor Chan Yoo

Chan Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230020689
    Abstract: Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a spacer material on an encapsulant such that the encapsulant separates the spacer material from an active surface of a semiconductor device and at least one interconnect projecting away from the active surface. The method further includes molding the encapsulant such that at least a portion of the interconnect extends through the encapsulant and into the spacer material. The interconnect can include a contact surface that is substantially co-planar with the active surface of the semiconductor device for providing an electrical connection with the semiconductor device.
    Type: Application
    Filed: September 23, 2022
    Publication date: January 19, 2023
    Inventors: Chan Yoo, Todd O. Bolken
  • Patent number: 11456286
    Abstract: Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a spacer material on an encapsulant such that the encapsulant separates the spacer material from an active surface of a semiconductor device and at least one interconnect projecting away from the active surface. The method further includes molding the encapsulant such that at least a portion of the interconnect extends through the encapsulant and into the spacer material. The interconnect can include a contact surface that is substantially co-planar with the active surface of the semiconductor device for providing an electrical connection with the semiconductor device.
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: September 27, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Chan Yoo, Todd O. Bolken
  • Patent number: 11285532
    Abstract: Provided are a boron-nitride nanoplatelet(s) (BNNP)/metal nanocomposite powder and a preparing method thereof, the BNNP/metal nanocomposite powder including a base metal and BNNP dispersed in the base metal and configured to serve as a reinforcement of the base metal, wherein the BNNP are interposed between metal particles of the base metal in the form of a thin film of a plurality of layers and combined with the metal particles, and an amount of the BNNP in the base metal is greater than 0 vol % and less than 90 vol %.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: March 29, 2022
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Soon Hyung Hong, Sung Chan Yoo, Jun Ho Lee, Hee Su Byeon
  • Patent number: 11034801
    Abstract: The present invention provides a method for preparing a transparent hydrogel membrane, the method including: (a) preparing 6 to 10 wt % of a hyaluronic acid solution based on a total weight of a mixture by dissolving a hyaluronic acid in a basic aqueous solution; (b) mixing, with the hyaluronic acid solution, 0.01 to 0.05 wt % of a crosslinking agent based on the total weight of the mixture; and (c) shaping the transparent hydrogel membrane by pouring the mixture into a mold.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: June 15, 2021
    Assignee: JCBIO CO., LTD.
    Inventors: Jae Chan Yoo, Yoo Lee Kang, Min Young Kong
  • Publication number: 20200269314
    Abstract: Provided are a boron-nitride nanoplatelet(s) (BNNP)/metal nanocomposite powder and a preparing method thereof, the BNNP/metal nanocomposite powder including a base metal and BNNP dispersed in the base metal and configured to serve as a reinforcement of the base metal, wherein the BNNP are interposed between metal particles of the base metal in the form of a thin film of a plurality of layers and combined with the metal particles, and an amount of the BNNP in the base metal is greater than 0 vol % and less than 90 vol %.
    Type: Application
    Filed: January 23, 2019
    Publication date: August 27, 2020
    Applicant: Korea Advanced Institute of Science and Technology
    Inventors: Soon Hyung HONG, Sung Chan YOO, Jun Ho LEE, Hee Su BYEON
  • Publication number: 20200262985
    Abstract: The present invention provides a method for preparing a transparent hydrogel membrane, the method including: (a) preparing 6 to 10 wt % of a hyaluronic acid solution based on a total weight of a mixture by dissolving a hyaluronic acid in a basic aqueous solution; (b) mixing, with the hyaluronic acid solution, 0.01 to 0.05 wt % of a crosslinking agent based on the total weight of the mixture; and (c) shaping the transparent hydrogel membrane by pouring the mixture into a mold.
    Type: Application
    Filed: September 18, 2018
    Publication date: August 20, 2020
    Inventors: Jae Chan YOO, Yoo Lee KANG, Min Young KONG
  • Publication number: 20200243493
    Abstract: Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a spacer material on an encapsulant such that the encapsulant separates the spacer material from an active surface of a semiconductor device and at least one interconnect projecting away from the active surface. The method further includes molding the encapsulant such that at least a portion of the interconnect extends through the encapsulant and into the spacer material. The interconnect can include a contact surface that is substantially co-planar with the active surface of the semiconductor device for providing an electrical connection with the semiconductor device.
    Type: Application
    Filed: April 6, 2020
    Publication date: July 30, 2020
    Inventors: Chan Yoo, Todd O. Bolken
  • Patent number: 10615154
    Abstract: Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a spacer material on an encapsulant such that the encapsulant separates the spacer material from an active surface of a semiconductor device and at least one interconnect projecting away from the active surface. The method further includes molding the encapsulant such that at least a portion of the interconnect extends through the encapsulant and into the spacer material. The interconnect can include a contact surface that is substantially co-planar with the active surface of the semiconductor device for providing an electrical connection with the semiconductor device.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: April 7, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Chan Yoo, Todd O. Bolken
  • Publication number: 20200075548
    Abstract: Systems, devices, and methods for interconnects for a multi-die package are described. A multi-die package may include a set of conductive pillars and two or more semiconductor dice that each include a bond pad. In some cases, the multi-die package may include a plurality of pillar-wire combinations, and a bond wire may couple a corresponding conductive pillar with a corresponding bond pad. Pillar-wire combinations may each collectively have a matched impedance, or pillar-wire combinations in different groups may have different collective impedances. In other cases, a conductive pillar may be directly coupled with a corresponding bond pad without a bond wire. Different pillar-wire combinations or directly-coupled pillars may carry different signals. In some cases, pillars may be individually impedance-matched to a desired impedance.
    Type: Application
    Filed: September 4, 2018
    Publication date: March 5, 2020
    Inventors: Kang-Yong Kim, Chan Yoo, Dong Soon Lim, Jaekyu Song
  • Patent number: 10366934
    Abstract: A semiconductor die that includes a first die located on a first side of an interposer and a second die located on a second side of the interposer. Active sides of the first and second dies may each face the interposer. A bond wire may electrically connect the first die to the second side of the interposer and a bond wire may electrically connect the second die to the first side of the interposer. The bond wires may extend through a plurality of windows in the interposer. First and second dies may be attached to a first side of an interposer and may be electrically connected to a second side of the interposer through windows and third and fourth dies may be attached to a second side of the interposer and may be electrically connected to the first side of the interposer through windows.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: July 30, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Chan Yoo, Akshay Singh, Yi Xu, Liana Foster, Steven Eskildsen
  • Publication number: 20190088565
    Abstract: A semiconductor die that includes a first die located on a first side of an interposer and a second die located on a second side of the interposer. Active sides of the first and second dies may each face the interposer. A bond wire may electrically connect the first die to the second side of the interposer and a bond wire may electrically connect the second die to the first side of the interposer. The bond wires may extend through a plurality of windows in the interposer. First and second dies may be attached to a first side of an interposer and may be electrically connected to a second side of the interposer through windows and third and fourth dies may be attached to a second side of the interposer and may be electrically connected to the first side of the interposer through windows.
    Type: Application
    Filed: November 20, 2018
    Publication date: March 21, 2019
    Inventors: Chan Yoo, Akshay Singh, Yi Xu, Liana Foster, Steven Eskildsen
  • Publication number: 20180358275
    Abstract: A semiconductor die that includes a first die located on a first side of an interposer and a second die located on a second side of the interposer. Active sides of the first and second dies may each face the interposer. A bond wire may electrically connect the first die to the second side of the interposer and a bond wire may electrically connect the second die to the first side of the interposer. The bond wires may extend through a plurality of windows in the interposer. First and second dies may be attached to a first side of an interposer and may be electrically connected to a second side of the interposer through windows and third and fourth dies may be attached to a second side of the interposer and may be electrically connected to the first side of the interposer through windows.
    Type: Application
    Filed: June 13, 2017
    Publication date: December 13, 2018
    Inventors: Chan Yoo, Akshay Singh, Yi Xu, Liana Foster, Steven Eskildsen
  • Patent number: 10153221
    Abstract: A semiconductor die that includes a first die located on a first side of an interposer and a second die located on a second side of the interposer. Active sides of the first and second dies may each face the interposer. A bond wire may electrically connect the first die to the second side of the interposer and a bond wire may electrically connect the second die to the first side of the interposer. The bond wires may extend through a plurality of windows in the interposer. First and second dies may be attached to a first side of an interposer and may be electrically connected to a second side of the interposer through windows and third and fourth dies may be attached to a second side of the interposer and may be electrically connected to the first side of the interposer through windows.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: December 11, 2018
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Chan Yoo, Akshay Singh, Yi Xu, Liana Foster, Steven Eskildsen
  • Publication number: 20180226387
    Abstract: Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a spacer material on an encapsulant such that the encapsulant separates the spacer material from an active surface of a semiconductor device and at least one interconnect projecting away from the active surface. The method further includes molding the encapsulant such that at least a portion of the interconnect extends through the encapsulant and into the spacer material. The interconnect can include a contact surface that is substantially co-planar with the active surface of the semiconductor device for providing an electrical connection with the semiconductor device.
    Type: Application
    Filed: March 30, 2018
    Publication date: August 9, 2018
    Inventors: Chan Yoo, Todd O. Bolken
  • Patent number: 9978730
    Abstract: Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a spacer material on an encapsulant such that the encapsulant separates the spacer material from an active surface of a semiconductor device and at least one interconnect projecting away from the active surface. The method further includes molding the encapsulant such that at least a portion of the interconnect extends through the encapsulant and into the spacer material. The interconnect can include a contact surface that is substantially co-planar with the active surface of the semiconductor device for providing an electrical connection with the semiconductor device.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: May 22, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Chan Yoo, Todd O. Bolken
  • Publication number: 20170040303
    Abstract: Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a spacer material on an encapsulant such that the encapsulant separates the spacer material from an active surface of a semiconductor device and at least one interconnect projecting away from the active surface. The method further includes molding the encapsulant such that at least a portion of the interconnect extends through the encapsulant and into the spacer material. The interconnect can include a contact surface that is substantially co-planar with the active surface of the semiconductor device for providing an electrical connection with the semiconductor device.
    Type: Application
    Filed: October 25, 2016
    Publication date: February 9, 2017
    Inventors: Chan Yoo, Todd O. Bolken
  • Patent number: 9508686
    Abstract: Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a spacer material on an encapsulant such that the encapsulant separates the spacer material from an active surface of a semiconductor device and at least one interconnect projecting away from the active surface. The method further includes molding the encapsulant such that at least a portion of the interconnect extends through the encapsulant and into the spacer material. The interconnect can include a contact surface that is substantially co-planar with the active surface of the semiconductor device for providing an electrical connection with the semiconductor device.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: November 29, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Chan Yoo, Todd O. Bolken
  • Publication number: 20150137365
    Abstract: Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a spacer material on an encapsulant such that the encapsulant separates the spacer material from an active surface of a semiconductor device and at least one interconnect projecting away from the active surface. The method further includes molding the encapsulant such that at least a portion of the interconnect extends through the encapsulant and into the spacer material. The interconnect can include a contact surface that is substantially co-planar with the active surface of the semiconductor device for providing an electrical connection with the semiconductor device.
    Type: Application
    Filed: December 8, 2014
    Publication date: May 21, 2015
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Chan Yoo, Todd O. Bolken
  • Publication number: 20150010986
    Abstract: Provided are a new microalgae strain and a use thereof, and more particularly, Ettlia sp. YC001 (KCTC 12109BP) having high carbon dioxide fixability, lipid productivity and carotenoid productivity, and a use thereof. The strain may be used for producing high quality biodiesel by controlling a lipid content and a composition ratio of a fatty acid according to culture conditions and/or culture time, and may be easily used for industrial uses, for examples, cosmetics, health foods, and medicines since large amounts of carotenoid and pigments are accumulated in cells.
    Type: Application
    Filed: April 4, 2012
    Publication date: January 8, 2015
    Inventors: Hee Mock Oh, Chan Yoo, Gang Guk Choi, Hee Sik Kim, Hyun Joon La, Chi Yong Ahn
  • Patent number: 8906743
    Abstract: Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a spacer material on an encapsulant such that the encapsulant separates the spacer material from an active surface of a semiconductor device and at least one interconnect projecting away from the active surface. The method further includes molding the encapsulant such that at least a portion of the interconnect extends through the encapsulant and into the spacer material. The interconnect can include a contact surface that is substantially co-planar with the active surface of the semiconductor device for providing an electrical connection with the semiconductor device.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: December 9, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Chan Yoo, Todd O. Bolken