Patents by Inventor Chan-yu HUNG

Chan-yu HUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190341389
    Abstract: A semiconductor device includes: active regions arranged in a first grid oriented substantially parallel to a first direction; and gate electrodes arranged spaced apart in a second grid and overlying corresponding ones of the active regions, the second grid being oriented substantially parallel to a second direction, the second direction being substantially orthogonal to the first direction. The first gaps are interspersed correspondingly between neighboring ones of the active regions. For a flyover intersection at which a corresponding gate electrode crosses over a corresponding active region and for which the gate electrode is not functionally connected to the corresponding active region, the gate electrode does not extend substantially beyond the corresponding active region and so does not extend substantially into a corresponding one of the first gaps.
    Type: Application
    Filed: July 15, 2019
    Publication date: November 7, 2019
    Inventors: Yu-Jen CHEN, Wen-Hsi LEE, Ling-Sung WANG, I-Shan HUANG, Chan-yu HUNG
  • Patent number: 10417369
    Abstract: A semiconductor structure includes: first and second active regions arranged in a first grid oriented in a first direction; and gate electrodes arranged spaced apart in a second grid and on corresponding ones of the active regions, the second grid being oriented in a second direction, the second direction being substantially perpendicular to the first direction; wherein: the first and second active regions are separated, relative to the second direction, by a gap; each gate electrode includes a first segment and a gate extension; each gate extension extends, relative to the second direction, beyond the corresponding active region and into the gap by a height HEXT, where HEXT?(?150 nm); and each gate extension, relative to a plane defined by the first and second directions, is substantially rectangular. In an embodiment, the height HEXT is HEXT?(?100 nm).
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: September 17, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Jen Chen, Ling-Sung Wang, I-Shan Huang, Chan-yu Hung
  • Patent number: 10373962
    Abstract: A semiconductor device includes: active regions arranged in a first grid oriented parallel to a first direction; and gate electrodes arranged spaced apart in a second grid and overlying corresponding ones of the active regions, the second grid being oriented parallel to a second direction, the second direction being orthogonal to the first direction. The first gaps are interspersed between neighboring ones of the active regions. For a flyover intersection at which a corresponding gate electrode crosses over a corresponding active region and for which the gate electrode is not functionally connected to the corresponding active region, the gate electrode does not extend substantially beyond the corresponding active region and so does not extend substantially into the corresponding gap.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: August 6, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Jen Chen, Wen-Hsi Lee, Ling-Sung Wang, I-Shan Huang, Chan-yu Hung
  • Publication number: 20190019732
    Abstract: Semiconductor device structures with reduced gate end width formed at gate structures and methods for manufacturing the same are provided.
    Type: Application
    Filed: July 17, 2017
    Publication date: January 17, 2019
    Inventors: CHAN-YU HUNG, LING-SUNG WANG, YU-JEN CHEN, I-SHAN HUANG
  • Patent number: 10181425
    Abstract: Semiconductor device structures with reduced gate end width formed at gate structures and methods for manufacturing the same are provided. In one example, a semiconductor device structure includes a plurality of gate structures formed over a plurality of fin structures, the gate structures formed substantially orthogonal to the fin structures, wherein the plurality of gate structures includes a first gate structure having a first gate end width and a second gate structure having a second gate end width, wherein the second gate end width is shorter than the first gate end width.
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: January 15, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chan-Yu Hung, Ling-Sung Wang, Yu-Jen Chen, I-Shan Huang
  • Publication number: 20180342523
    Abstract: A semiconductor device includes: active regions arranged in a first grid oriented parallel to a first direction; and gate electrodes arranged spaced apart in a second grid and overlying corresponding ones of the active regions, the second grid being oriented parallel to a second direction, the second direction being orthogonal to the first direction. The first gaps are interspersed between neighboring ones of the active regions. For a flyover intersection at which a corresponding gate electrode crosses over a corresponding active region and for which the gate electrode is not functionally connected to the corresponding active region, the gate electrode does not extend substantially beyond the corresponding active region and so does not extend substantially into the corresponding gap.
    Type: Application
    Filed: October 10, 2017
    Publication date: November 29, 2018
    Inventors: Yu-Jen CHEN, Wen-Hsi LEE, Ling-Sung WANG, I-Shan HUANG, Chan-yu HUNG
  • Publication number: 20180341736
    Abstract: A semiconductor structure includes: first and second active regions arranged in a first grid oriented in a first direction; and gate electrodes arranged spaced apart in a second grid and on corresponding ones of the active regions, the second grid being oriented in a second direction, the second direction being substantially perpendicular to the first direction; wherein: the first and second active regions are separated, relative to the second direction, by a gap; each gate electrode includes a first segment and a gate extension; each gate extension extends, relative to the second direction, beyond the corresponding active region and into the gap by a height HEXT, where HEXT?(?150 nm); and each gate extension, relative to a plane defined by the first and second directions, is substantially rectangular. In an embodiment, the height HEXT is HEXT?(?100 nm).
    Type: Application
    Filed: April 10, 2018
    Publication date: November 29, 2018
    Inventors: Yu-Jen CHEN, Ling-Sung WANG, I-Shan HUANG, Chan-yu HUNG