Patents by Inventor Chanchal Chatterjee
Chanchal Chatterjee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260267765Abstract: Systems and methods for monitoring data center metrics using machine learning are disclosed. A system can obtain a first set of sensor readings from data center components during a first time period. The system can generate a dataset using the first set of sensor readings and a negative sampling function. The dataset can include labels generated according to a learned distribution derived from the first set of sensor readings. The system can update a machine learning model using the dataset to predict likelihoods of future anomalies in the plurality of data center components. The system can obtain a second set of sensor readings from the data center components during a second time period. The system can generate, using the machine learning model and the second set of sensor readings, a prediction of a future anomaly that may occur in at least one of the data center components.Type: ApplicationFiled: March 6, 2025Publication date: September 10, 2026Applicant: NVIDIA CorporationInventors: Shikhar SHIROMANI, Himanshu BHAT, Chanchal CHATTERJEE, Pradeep Kumar SHIMA
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Patent number: 9582157Abstract: A user interface for display and navigation of multiple video programs displays a graphical user interface including a plurality of available video programs. A user is allowed to generate a custom list of video programs by selecting at least one video program from the plurality of video programs. The videos programs from the custom list are simultaneously displayed while displaying the graphical user interface to the user.Type: GrantFiled: August 2, 2013Date of Patent: February 28, 2017Assignee: I4VU1, Inc.Inventors: Chanchal Chatterjee, Robert Owen Eifrig
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Patent number: 9287852Abstract: A method in a signal processor for filtering samples in a digital signal is provided. An approximate filtered sample is generated as a function of less than four samples of the digital signal. A correction is generated as a function of the less than four samples, and a filtered sample is generated by modifying the approximate filtered sample with the correction.Type: GrantFiled: August 22, 2006Date of Patent: March 15, 2016Assignee: Google Technology Holdings LLCInventor: Chanchal Chatterjee
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Patent number: 8908765Abstract: The present invention discloses a system and method for performing motion estimation associated with an encoder, e.g., a H.264/MPEG-4 AVC compliant encoder. For example, the method selects a motion vector centering for a current block in a search area of at least one reference picture. The method calculates a matching cost for each of a plurality of candidate motion vectors derived from the search area, and outputs at least one of the plurality of candidate motion vectors based on the matching cost associated with each of the plurality of candidate motion vectors to a main coding loop.Type: GrantFiled: November 15, 2007Date of Patent: December 9, 2014Assignee: General Instrument CorporationInventors: Krit Panusopone, Chanchal Chatterjee, Robert O. Eifrig, Ajay K. Luthra, Limin Wang
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Patent number: 7991813Abstract: A method in a signal processor for filtering samples in a digital signal is provided. An approximate filtered sample is generated as a function of four samples of the digital signal. A correction is generated as a function of the four samples, and a filtered sample is generated by modifying the approximate filtered sample with the correction.Type: GrantFiled: August 29, 2005Date of Patent: August 2, 2011Assignee: General Instrument CorporationInventor: Chanchal Chatterjee
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Publication number: 20100150168Abstract: Methods and apparatus for generating a multiplex of a plurality of services (such as a plurality of digitally encoded video streams). In one embodiment, the methods comprise setting a target bitrate for a statistical multiplex, and determining the complexity of the services to be multiplexed. One or more requirements of the services are adjusted so that the multiplex meets a target bitrate. In one variant, the services comprise H.264 encoded and transrated video data streams. Exemplary multiplexing apparatus is also disclosed.Type: ApplicationFiled: November 16, 2009Publication date: June 17, 2010Inventors: Chanchal Chatterjee, Robert Owen Eifrig
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Publication number: 20100128779Abstract: Methods and apparatus for splicing multiple video streams together. In one embodiment, two compressed video bit streams having one or more disparate qualities, such as bit rate, format, field parity, etc., are spliced together to form a single video bit stream that is free from any significant artifact. In one variant, a splicing boundary is located (e.g., at an I-frame or P-frame of a first stream), and the second stream spliced in at that point. A correction (e.g., addition or deletion of a frame) is then applied. In one implementation, the process maintains compliance with H.264 requirements.Type: ApplicationFiled: November 13, 2009Publication date: May 27, 2010Inventors: Chanchal Chatterjee, Robert Owen Eifrig
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Publication number: 20100118982Abstract: Apparatus and methods for transcoding one or more compressed video bitstreams. In one embodiment, the method comprises partially decoding an input video bitstream to produce a partially decoded intermediate video bitstream generated without performing a deblocking operation, extracting syntax pass-through information from the input video bitstream, and producing an output video bitstream from the intermediate video bitstream by using, for each macroblock, the macroblock decision from the input video bitstream.Type: ApplicationFiled: October 23, 2009Publication date: May 13, 2010Inventors: Chanchal Chatterjee, Robert Owen Eifrig
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Publication number: 20100118948Abstract: Apparatus and methods for processing (e.g., transrating) one or more compressed video bitstreams including mode refinement analysis. In one embodiment, a method of transrating a digital video picture having a plurality of input macroblocks, each input macroblock having at least first and second attributes (e.g., slice type, encoding mode, and a “skipped” mode) is disclosed. In one variant, the method comprises generating an output macroblock corresponding to each input macroblock, with each of the output macroblocks having the first and second attributes. For each output macroblock having a first value for the first attribute (e.g., slice type), the second attribute (e.g., encoding mode) is decided at least in part by evaluating one or more error criteria, the error criteria being responsive to the second attribute of a corresponding input macroblock.Type: ApplicationFiled: October 23, 2009Publication date: May 13, 2010Inventors: Chanchal Chatterjee, Robert Owen Eifrig
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Publication number: 20100104015Abstract: Apparatus and methods for transcoding one or more compressed video bitstreams. In one embodiment, the method comprises partially decoding an input video bitstream to produce a partially decoded intermediate video bitstream generated without performing a deblocking operation, extracting syntax pass-through information from the input video bitstream, and producing an output video bitstream from the intermediate video bitstream by using, for each macroblock, the macroblock decision from the input video bitstream.Type: ApplicationFiled: February 9, 2009Publication date: April 29, 2010Inventors: Chanchal Chatterjee, Robert Owen Eifrig
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Publication number: 20100104022Abstract: Apparatus and methods for processing (e.g., transrating) one or more compressed video bitstreams including mode refinement analysis. In one embodiment, a method of transrating a digital video picture having a plurality of input macroblocks, each input macroblock having at least first and second attributes (e.g., slice type, encoding mode, and a “skipped” mode) is disclosed. In one variant, the method comprises generating an output macroblock corresponding to each input macroblock, with each of the output macroblocks having the first and second attributes. For each output macroblock having a first value for the first attribute (e.g., slice type), the second attribute (e.g., encoding mode) is decided at least in part by evaluating one or more error criteria, the error criteria being responsive to the second attribute of a corresponding input macroblock.Type: ApplicationFiled: March 2, 2009Publication date: April 29, 2010Inventors: Chanchal Chatterjee, Robert Owen Eifrig
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Patent number: 7636746Abstract: A method in a signal processor for filtering samples in a digital signal is provided. An approximate filtered sample is generated as a function of eight samples of the digital signal. A correction is generated as a function of the eight samples, and a filtered sample is generated by modifying the approximate filtered sample with the correction.Type: GrantFiled: August 29, 2005Date of Patent: December 22, 2009Assignee: General Instrument CorporationInventor: Chanchal Chatterjee
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Publication number: 20090129472Abstract: The present invention discloses a system and method for performing motion estimation associated with an encoder, e.g., a H.264/MPEG-4 AVC compliant encoder. For example, the method selects a motion vector centering for a current block in a search area of at least one reference picture. The method calculates a matching cost for each of a plurality of candidate motion vectors derived from the search area, and outputs at least one of the plurality of candidate motion vectors based on the matching cost associated with each of the plurality of candidate motion vectors to a main coding loop.Type: ApplicationFiled: November 15, 2007Publication date: May 21, 2009Applicant: GENERAL INSTRUMENT CORPORATIONInventors: Krit Panusopone, Chanchal Chatterjee, Robert O. Eifrig, Ajay K. Luthra, Limin Wang
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Publication number: 20080137726Abstract: A real-time encoder, e.g., a real-time H.264 compliant encoder or a real-time AVC compliant encoder is disclosed. For example, the encoder comprises a first digital signal processor (DSP) for processing a first panel of an input image and a second digital signal processor (DSP) for processing a second panel of the input image. Finally, the encoder comprises a field programmable gate array (FPGA) for supporting both the first DSP and the second DSP.Type: ApplicationFiled: December 12, 2006Publication date: June 12, 2008Applicant: GENERAL INSTRUMENT CORPORATIONInventors: Chanchal Chatterjee, Robert O. Eifrig, Robert S. Nemiroff
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Publication number: 20080107183Abstract: A method and apparatus for determining whether a block of pixels will likely contain all zero coefficients for various video encoding functions are disclosed. For example, the method receives or obtains a block of pixels from an input image and computes a distortion measure for the block of pixels. The method then determines whether the block of pixels contains all zero coefficients in accordance with the distortion measure.Type: ApplicationFiled: April 6, 2007Publication date: May 8, 2008Applicant: GENERAL INSTRUMENT CORPORATIONInventor: Chanchal Chatterjee
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Publication number: 20080107176Abstract: A method and apparatus for determining whether a block of pixels will likely contain all zero coefficients for various video encoding functions are disclosed. For example, the method receives or obtains a block of pixels from an input image and computes a measure for the block of pixels, where the measure comprises at least one of: a distortion measure or a maximum of absolute values of residuals measure. The method then determines whether the block of pixels contains all zero coefficients in accordance with the measure.Type: ApplicationFiled: November 2, 2007Publication date: May 8, 2008Applicant: General Instrument CorporationInventors: Chanchal Chatterjee, Yue Yu, Limin Wang
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Publication number: 20080025395Abstract: Method and apparatus for motion estimation in a video encoder is described. In one example, a motion estimator includes registers, first-in-first out (FIFO) logic, costing logic, and processing logic. The registers are configured to store an even field and an odd field of a current macroblock pair in a current frame in a video stream. The FIFO logic is configured to store a reference window of a reference frame in the video stream. The costing logic is configured to produce cost data. The processing logic is coupled to the registers, the FIFO logic, and the costing logic. The processing logic is configured to generate common sums of absolute differences (SADs) for the current macroblock pair, generate SADs for partitions of the current macroblock pair from combinations of the common SADs, and cost and minimize the SADs for the partitions.Type: ApplicationFiled: July 27, 2006Publication date: January 31, 2008Applicant: GENERAL INSTRUMENT CORPORATIONInventors: Robert S. Nemiroff, Chanchal Chatterjee, Robert O. Eifrig, Michael A. Grossman, Vicky B. Kaku, Zdong Wang, James R. Heaton
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Patent number: 7177889Abstract: A method in a signal processor for filtering samples in a digital signal is provided. An approximate filtered sample is generated as a function of less than four samples of the digital signal. A correction is generated as a function of the less than four samples, and a filtered sample is generated by modifying the approximate filtered sample with the correction.Type: GrantFiled: January 23, 2002Date of Patent: February 13, 2007Assignee: General Instrument Corp.Inventor: Chanchal Chatterjee
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Publication number: 20060282488Abstract: A method in a signal processor for filtering samples in a digital signal is provided. An approximate filtered sample is generated as a function of less than four samples of the digital signal. A correction is generated as a function of the less than four samples, and a filtered sample is generated by modifying the approximate filtered sample with the correction.Type: ApplicationFiled: August 22, 2006Publication date: December 14, 2006Applicant: GENERAL INSTRUMENT CORPORATIONInventor: Chanchal Chatterjee
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Patent number: 7130876Abstract: A method in a signal processor for quantizing a digital signal is provided. A fixed-point approximation of a value X÷Q is generated, wherein X is a fixed-point value based on one or more samples in the digital signal, and wherein Q is a fixed-point quantization parameter. A correction is generated, and the approximation is modified with the correction.Type: GrantFiled: November 30, 2001Date of Patent: October 31, 2006Assignee: General Instrument CorporationInventor: Chanchal Chatterjee