Patents by Inventor Chandra Thimmanagari

Chandra Thimmanagari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Register window fill technique for retirement window having entry size less than amount of fill instructions
    Patent number: 7035999
    Abstract: A register window fill technique for a retirement window having an entry size less than a number of fill instructions used in a fill condition is provided. The technique uses modified fill instructions that allow the retirement window to retire a portion of the fill instructions without having to determine whether a remaining portion of the fill instructions will execute without exceptions.
    Type: Grant
    Filed: June 7, 2002
    Date of Patent: April 25, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Chandra Thimmanagari, Sorin Iacobovici, Rabin Sugumar, Robert Nuckolls
  • Register window spill technique for retirement window having entry size less than amount of spill instructions
    Patent number: 7024541
    Abstract: A register window spill technique for an retirement window having an entry size less than a number of spill instructions used in a spill condition is provided. The technique uses modified spill instructions that allow the retirement window to retire a portion of the spill instructions without having to determine whether a remaining portion of the spill instructions will execute without exceptions.
    Type: Grant
    Filed: June 7, 2002
    Date of Patent: April 4, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Chandra Thimmanagari, Sorin Iacobovici, Rabin Sugumar, Robert Nuckolls
  • Register window fill technique for retirement window having entry size less than amount of fill instructions
    Publication number: 20030229772
    Abstract: A register window fill technique for a retirement window having an entry size less than a number of fill instructions used in a fill condition is provided. The technique uses modified fill instructions that allow the retirement window to retire a portion of the fill instructions without having to determine whether a remaining portion of the fill instructions will execute without exceptions.
    Type: Application
    Filed: June 7, 2002
    Publication date: December 11, 2003
    Inventors: Chandra Thimmanagari, Sorin Iacobovici, Rabin Sugumar, Robert Nuckolls
  • Register window spill technique for retirement window having entry size less than amount of spill instructions
    Publication number: 20030229771
    Abstract: A register window spill technique for an retirement window having an entry size less than a number of spill instructions used in a spill condition is provided. The technique uses modified spill instructions that allow the retirement window to retire a portion of the spill instructions without having to determine whether a remaining portion of the spill instructions will execute without exceptions.
    Type: Application
    Filed: June 7, 2002
    Publication date: December 11, 2003
    Inventors: Chandra Thimmanagari, Sorin Iacobovici, Rabin Sugumar, Robert Nuckolls
  • Register flattening logic
    Publication number: 20030221088
    Abstract: A technique for flattening architectural register windows into flattened space depending on a current window pointer to a register window is provided. The technique involves converting an n-bit value of a particular register in a register window to an x-bit value dependent on the current window pointer, where x is greater than n, and where the x-bit value is used for register dependency checking among a plurality of instructions.
    Type: Application
    Filed: May 24, 2002
    Publication date: November 27, 2003
    Inventors: Chandra Thimmanagari, Sorin Iacobovici, Rabin Sugumar, Robert Nuckolls
  • On-chip cache redundancy technique
    Publication number: 20030191885
    Abstract: A technique for operating a cache memory in one of multiple modes is provided. The technique involves using an fuse dependent control stage to control the generation of read and write enable signals to redundantly implemented tag and data arrays such that a portion of the cache memory may be effectively used even if another portion of the cache memory is defective due to malfunction, yield issues, process variations, etc.
    Type: Application
    Filed: April 9, 2002
    Publication date: October 9, 2003
    Inventors: Chandra Thimmanagari, Jui-Cheng Su