Patents by Inventor Chandrakumar R. Pathi

Chandrakumar R. Pathi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9363067
    Abstract: Interface circuitry and method for transmitting and receiving downstream and upstream data signals simultaneously via a common conductor pair. The composite signal containing the downstream and upstream data signal components being conveyed by the common conductor pair is isolated, e.g., via signal filtering or buffering, and combined with an appropriately scaled inverse replica of the outgoing upstream data signal to subtract out upstream data signal components and thereby provide the downstream data signal substantially free of any upstream data signal components.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: June 7, 2016
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Vijaya G. Ceekala, Qingping Zheng, Min Du, Xin Liu, Chandrakumar R. Pathi
  • Publication number: 20150188689
    Abstract: Interface circuitry and method for transmitting and receiving downstream and upstream data signals simultaneously via a common conductor pair. The composite signal containing the downstream and upstream data signal components being conveyed by the common conductor pair is isolated, e.g., via signal filtering or buffering, and combined with an appropriately scaled inverse replica of the outgoing upstream data signal to subtract out upstream data signal components and thereby provide the downstream data signal substantially free of any upstream data signal components.
    Type: Application
    Filed: December 24, 2014
    Publication date: July 2, 2015
    Inventors: Vijaya G. Ceekala, Qingping Zheng, Min Du, Xin Liu, Chandrakumar R. Pathi
  • Patent number: 8923166
    Abstract: Interface circuitry and method for transmitting and receiving downstream and upstream data signals simultaneously via a common conductor pair. The composite signal containing the downstream and upstream data signal components being conveyed by the common conductor pair is isolated, e.g., via signal filtering or buffering, and combined with an appropriately scaled inverse replica of the outgoing upstream data signal to subtract out upstream data signal components and thereby provide the downstream data signal substantially free of any upstream data signal components.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: December 30, 2014
    Assignee: National Semiconductor Corporation
    Inventors: Vijaya G. Ceekala, Qingping Zheng, Min Du, Xin Liu, Chandrakumar R. Pathi
  • Publication number: 20120002573
    Abstract: Interface circuitry and method for transmitting and receiving downstream and upstream data signals simultaneously via a common conductor pair. The composite signal containing the downstream and upstream data signal components being conveyed by the common conductor pair is isolated, e.g., via signal filtering or buffering, and combined with an appropriately scaled inverse replica of the outgoing upstream data signal to subtract out upstream data signal components and thereby provide the downstream data signal substantially free of any upstream data signal components.
    Type: Application
    Filed: March 10, 2011
    Publication date: January 5, 2012
    Inventors: Vijaya G. Ceekala, Qingping Zheng, Min Du, Xin Liu, Chandrakumar R. Pathi