Abstract: A high speed bus for communicating between a processing component and a display component of a computer. The high speed bus substantially enhances video graphics application performance by allowing the process component and the display component to communicate without using the system bus. By coupling the processing component and the display component via a high speed bus, video graphics instructions may be routed directly from the processing component to the display component, thereby eliminating the delay associated with the slower standard system bus lines. By using the high speed bus, the processing component is able to communicate with the display component without having to place instructions onto the busier system bus.

Abstract: A power suspend mode activates a slow DRAM refresh in a computer system with a limited source of power. The power suspend mode reduces the power consumed by the computer system while preserving the contents of memory. The cyclic refresh of DRAM using a slow refresh clock substantially reduces the power consumed while the computer is suspended. This technique is particularly useful for battery powered portable computer systems. When an external or internal condition causes the computer system to transition to a power down mode, an IO subsystem notifies the CPU which sets control bits in the IO subsystem and a video subsystem. The IO subsystem then begins to generate a slow DRAM refresh pulse. Once the CPU and video subsystem sense the power suspend mode activation, the system memory and video memory are refreshed using the slow refresh clock. The power consumed during the refresh process is thereby greatly reduced.