Patents by Inventor Chang An Chu

Chang An Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220384403
    Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.
    Type: Application
    Filed: August 5, 2022
    Publication date: December 1, 2022
    Inventors: Tung-Kai LIU, Tsau-Hua HSIEH, Wei-Cheng CHU, Chun-Hsien LIN, Chandra LIUS, Ting-Kai HUNG, Kuan-Feng LEE, Ming-Chang LIN, Tzu-Min YAN, Hui-Chieh WANG
  • Publication number: 20220377913
    Abstract: A method for manufacturing a circuit board, includes: stacking a first peelable film on a second peelable film, and disposing fluffy carbon nanotubes between the first peelable film and the second peelable film, thereby obtaining a carbon nanotube layer; pressing the first peelable film, the carbon nanotube layer, and the second peelable film to compact the fluffy carbon nanotubes, thereby obtaining a thermal conductive layer; removing the first peelable film, and disposing a first adhesive layer, a first dielectric layer, and a first circuit layer on a side of the thermal conductive layer away from the second peelable film; removing the second peelable film, and disposing a second adhesive layer, a second dielectric layer, and a second circuit layer on a side of the thermal conductive layer away from the first adhesive layer; mounting an electronic component on the first circuit layer.
    Type: Application
    Filed: June 22, 2021
    Publication date: November 24, 2022
    Inventors: YIN-JU CHEN, JING-CYUAN YANG, YEN-CHANG CHU
  • Publication number: 20220367655
    Abstract: A method to form a transistor device with a recessed gate structure is provided. In one embodiment, a gate structure is formed overlying a device region and an isolation structure. The gate structure separates a device doping well along a first direction with a pair of recess regions disposed on opposite sides of the device region in a second direction perpendicular to the first direction. A pair of source/drain regions in is formed the device region on opposite sides of the gate structure. A sidewall spacer is formed extending along sidewalls of the gate structure, where a top surface of the sidewall spacer is substantially flush with the top surface of the gate structure. A resistive protection layer is then formed on the sidewall spacer and covering the pair of recess regions.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Inventors: Chen-Liang Chu, Chien-Chih Chou, Chih-Chang Cheng, Yi-Huan Chen, Kong-Beng Thei, Ming-Ta Lei, Ruey-Hsin Liu, Ta-Yuan Kung
  • Publication number: 20220359369
    Abstract: Semiconductor devices having improved heat dissipation and methods of forming the same are disclosed. In an embodiment, a device includes a first transistor structure; a front-side interconnect structure on a front-side of the first transistor structure, the front-side interconnect structure including front-side conductive lines; a backside interconnect structure on a backside of the first transistor structure, the backside interconnect structure including backside conductive lines, the backside conductive lines having line widths greater than line widths of the front-side conductive lines; and a first heat dissipation substrate coupled to the backside interconnect structure.
    Type: Application
    Filed: July 21, 2021
    Publication date: November 10, 2022
    Inventors: Chen-Fong Tsai, Cheng-I Chu, Jyh-Cherng Sheu, Huicheng Chang, Yee-Chia Yeo
  • Publication number: 20220324202
    Abstract: A glass element having a thickness from 25 ?m to 125 ?m, a first primary surface, a second primary surface, and a compressive stress region extending from the first primary surface to a first depth, the region defined by a compressive stress GI of at least about 100 MPa at the first primary surface. Further, the glass element has a stress profile such that it does not fail when it is subject to 200,000 cycles of bending to a target bend radius of from 1 mm to 20 mm, by the parallel plate method. Still further, the glass element has a puncture resistance of greater than about 1.5 kgf when the first primary surface of the glass element is loaded with a tungsten carbide ball having a diameter of 1.5 mm.
    Type: Application
    Filed: June 13, 2022
    Publication date: October 13, 2022
    Inventors: Theresa Chang, Polly Wanda Chu, Patrick Joseph Cimo, Adam James Ellison, Timothy Michael Gross, Guangli Hu, Nicholas James Smith, Butchi Reddy Vaddi, Natesan Venkataraman
  • Publication number: 20220310449
    Abstract: An integrated circuit structure includes a package component, which further includes a non-porous dielectric layer having a first porosity, and a porous dielectric layer over and contacting the non-porous dielectric layer, wherein the porous dielectric layer has a second porosity higher than the first porosity. A bond pad penetrates through the non-porous dielectric layer and the porous dielectric layer. A dielectric barrier layer is overlying, and in contact with, the porous dielectric layer. The bond pad is exposed through the dielectric barrier layer. The dielectric barrier layer has a planar top surface. The bond pad has a planar top surface higher than a bottom surface of the dielectric barrier layer.
    Type: Application
    Filed: June 16, 2022
    Publication date: September 29, 2022
    Inventors: Hsun-Chung Kuang, Yen-Chang Chu, Cheng-Tai Hsiao, Ping-Yin Liu, Lan-Lin Chao, Yeur-Luen Tu, Chia-Shiung Tsai, Xiaomeng Chen
  • Patent number: 11457173
    Abstract: The present invention provides a control method of a processor, wherein the control method comprises the steps of: transmitting image data of a first frame to an integrated circuit, wherein the first frame corresponds to a first frame rate; determining a second frame rate of a second frame next to the first frame; determining if a difference between the second frame rate and the first frame rate belongs to a large scale frame rate adjustment or a small scale frame rate adjustment; if the difference between the second frame rate and the first frame rate belongs to the large scale frame rate adjustment, using a first mode to transmit image data of the second frame; and if the difference between the second frame rate and the first frame rate belongs to the small scale frame rate adjustment, using a second mode to transmit image data of the second frame.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: September 27, 2022
    Assignee: MEDIATEK INC.
    Inventors: Kang-Yi Fan, Chin-Wen Liang, Chang-Chu Liu, Sheng-Hsiang Chang, You-Min Yeh
  • Patent number: 11453659
    Abstract: A compound for an organic optoelectronic device, a composition for an organic optoelectronic device, an organic optoelectronic device, and a display device, the compound for an organic optoelectronic device being represented by the following Chemical Formula 1:
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: September 27, 2022
    Assignee: SAMSUNG SDI CO., LTD.
    Inventors: Hanill Lee, Hyung Sun Kim, Chang Ju Shin, Dongkyu Ryu, Jiah Yoon, Sung-Hyun Jung, Handong Chu
  • Patent number: 11456753
    Abstract: A signal processor includes a signal receiving circuit, a pre-processing circuit, a period acquisition circuit, and a decoding circuit. The signal receiving circuit is configured to receive an input signal. The pre-processing circuit is configured to generate a square wave signal according to the input signal. The period acquisition circuit is configured to capture several periods of the square wave signal. The several signal periods includes several signal period groups, and each of the several signal period groups includes at least two signal periods of the several signal periods. The at least two signal periods are adjacent to each other. The decoding circuit is coupled to the period acquisition circuit and is configured to perform decoding according to a time length and a number of times of voltage value change of the several signal period groups to obtain a decoding result.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: September 27, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Yuan-Jih Chu, Bo-Cheng Lin, Chia-Chang Lin, Li-Chung Chen
  • Patent number: 11444169
    Abstract: A transistor device with a recessed gate structure is provided. In some embodiments, the transistor device comprises a semiconductor substrate comprising a device region surrounded by an isolation structure and a pair of source/drain regions disposed in the device region and laterally spaced apart one from another in a first direction. A gate structure overlies the device region and the isolation structure and arranged between the pair of source/drain regions. The gate structure comprises a pair of recess regions disposed on opposite sides of the device region in a second direction perpendicular to the first direction. A channel region is disposed in the device region underneath the gate structure. The channel region has a channel width extending in the second direction from one of the recess regions to the other one of the recess regions.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: September 13, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Liang Chu, Chien-Chih Chou, Chih-Chang Cheng, Yi-Huan Chen, Kong-Beng Thei, Ming-Ta Lei, Ruey-Hsin Liu, Ta-Yuan Kung
  • Patent number: 11437288
    Abstract: A display device includes a substrate, a light-emitting element, and a transistor. The substrate has a top surface. The light-emitting element is disposed on the substrate, and includes a first electrode and a second electrode. The transistor is disposed on the substrate and electrically connected to the light-emitting element. The transistor includes a gate electrode and a semiconductor layer. The semiconductor layer includes an overlapping portion overlapped with the gate electrode. The first electrode and the second electrode of the light-emitting element do not overlap with the overlapping portion along a direction perpendicular to the top surface of the substrate.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: September 6, 2022
    Assignee: INNOLUX CORPORATION
    Inventors: Tung-Kai Liu, Tsau-Hua Hsieh, Wei-Cheng Chu, Chun-Hsien Lin, Chandra Lius, Ting-Kai Hung, Kuan-Feng Lee, Ming-Chang Lin, Tzu-Min Yan, Hui-Chieh Wang
  • Publication number: 20220268682
    Abstract: There is provided a smoke detector including a substrate, a light source and a light sensor. The light source and the light sensor are arranged adjacently on the substrate. The substrate is arranged with an asymmetric structure to cause an illumination region of the light source to deviate toward the light sensor thereby increasing a ratio of light intensity reflected by smoke with respect to reference light intensity.
    Type: Application
    Filed: May 10, 2022
    Publication date: August 25, 2022
    Inventors: YEN-CHANG CHU, CHENG-NAN TSAI, CHIH-MING SUN
  • Publication number: 20220262925
    Abstract: Embodiments include nanostructure devices and methods of forming nanostructure devices which include a treatment process to expand a sidewall spacer material to close a seam in the sidewall spacer material after deposition. The treatment process includes oxidation anneal and heat anneal to expand the sidewall spacer material and crosslink the open seam to form a closed seam, lower k-value, and decrease density.
    Type: Application
    Filed: May 17, 2021
    Publication date: August 18, 2022
    Inventors: Li-Chi Yu, Cheng-I Chu, Chen-Fong Tsai, Yi-Rui Chen, Sen-Hong Syue, Wen-Kai Lin, Yoh-Rong Liu, Huicheng Chang, Yee-Chia Yeo
  • Publication number: 20220246578
    Abstract: A memory device including a first semiconductor die and a memory cube mounted on and connected with the first semiconductor die is described. The memory cube includes multiple stacked tiers, and each tier of the multiple stacked tiers includes second semiconductor dies laterally wrapped by an encapsulant and a redistribution structure disposed on the second semiconductor dies and the encapsulant. The second semiconductor dies of the multiple stacked tiers are electrically connected with the first semiconductor die through the redistribution structures in the multiple stacked tiers.
    Type: Application
    Filed: April 19, 2022
    Publication date: August 4, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu Huang, Han-Ping Pu, Ming-Kai Liu, Ting-Chu Ko, Yung-Ping Chiang, Chang-Wen Huang, Yu-Sheng Hsieh
  • Publication number: 20220222385
    Abstract: An integrated circuit (IC) applicable to performing system protection through dynamic voltage change may include a monitoring circuit, at least one power voltage generation circuit and a voltage adjustment circuit. The monitoring circuit monitors at least one security checking result of a security engine to determine whether at least one security event occurs. The at least one power voltage generation circuit generates at least one internal power voltage within the IC according to at least one input voltage received from outside of the IC, to provide the internal power voltage to at least one internal component of the IC. In response to occurrence of the at least one security event, the voltage adjustment circuit controls the at least one power voltage generation circuit to dynamically adjust the at least one internal power voltage, to control the internal power voltage randomly exceed predetermined voltage range thereof, thereby performing the system protection.
    Type: Application
    Filed: December 9, 2021
    Publication date: July 14, 2022
    Applicant: Realtek Semiconductor Corp.
    Inventors: Chang-Hsien Tai, Chia-Chu Cho
  • Publication number: 20220223066
    Abstract: An English pronunciation assessment method includes: receiving an audio file including an English speech and a text transcript corresponding to the English speech; inputting audio signal to one or more acoustic models to obtain phonetic information of each phone in each word, wherein the one or more acoustic models are trained with speeches spoken by native speakers and further with speeches spoken by non-native speakers without labeling out mispronunciations, such that a pronunciation error is detected more accurately based on the obtained phonetic information; extracting time series features of each word; inputting the extracted time series features of each word, the obtained phonetic information of each phone in each word, and the audio signal included in the audio file to a lexical stress model to obtain misplaced lexical stress in each of words in the English speech with different number of syllables without expanding short words to cause input approximation.
    Type: Application
    Filed: January 8, 2021
    Publication date: July 14, 2022
    Inventors: Ziyi CHEN, Iek heng CHU, Wei CHU, Xinlu YU, Tian XIA, Peng CHANG, Mei HAN, Jing XIAO
  • Publication number: 20220208607
    Abstract: An integrated circuit structure includes a package component, which further includes a non-porous dielectric layer having a first porosity, and a porous dielectric layer over and contacting the non-porous dielectric layer, wherein the porous dielectric layer has a second porosity higher than the first porosity. A bond pad penetrates through the non-porous dielectric layer and the porous dielectric layer. A dielectric barrier layer is overlying, and in contact with, the porous dielectric layer. The bond pad is exposed through the dielectric barrier layer. The dielectric barrier layer has a planar top surface. The bond pad has a planar top surface higher than a bottom surface of the dielectric barrier layer.
    Type: Application
    Filed: March 17, 2022
    Publication date: June 30, 2022
    Inventors: Hsun-Chung Kuang, Yen-Chang Chu, Cheng-Tai Hsiao, Ping-Yin Liu, Lan-Lin Chao, Yeur-Luen Tu, Chia-Shiung Tsai, Xiaomeng Chen
  • Publication number: 20220165141
    Abstract: There is provided a smoke detector including a light source, a reflective surface, a light sensor and a processor. The light sensor receives reflected light when the light source emits light toward the reflective surface, and generates a reference detection signal when there is no smoke. The processor receives the detection signal from the light sensor, and automatically selects a set of predetermined condition thresholds according to a profile of the detection signal to be compared with the detection signal thereby determining whether to generate an alarm according to the comparison result.
    Type: Application
    Filed: May 14, 2021
    Publication date: May 26, 2022
    Inventors: Cheng-Nan TSAI, Guo-Zhen WANG, Ching-Kun CHEN, Yen-Chang CHU, Chih-Ming SUN
  • Patent number: 11338449
    Abstract: Systems, apparatus, and methods of manufacturing an article using electroadhesion technology for the pick-up and release of materials, respectively.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: May 24, 2022
    Assignee: Grabit, Inc.
    Inventors: Harsha Prahlad, Richard J. Casler, Susan Kim, Matthew Leettola, Jon Smith, Kenneth Tan, Patrick Wang, John Mathew Farren, Patrick Conall Regan, Po Cheng Chen, Howard Fu, Dragan Jurkovic, Aishwarya Varadhan, Chang-Chu Liao, Chih-Chi Chang, Kuo-Hung Lee, Ming-Feng Jean
  • Publication number: 20220151345
    Abstract: Manufacturing and assembly of a shoe or a portion of a shoe is enhanced by automated placement and assembly of shoe parts. For example, a part-recognition system analyzes an image of a shoe part to identify the part and determine a location of the part. Once the part is identified and located, the part can be manipulated by an automated manufacturing tool.
    Type: Application
    Filed: January 28, 2022
    Publication date: May 19, 2022
    Inventors: Patrick Conall Regan, Kuo-Hung Lee, Chih-Chi Chang, Ming-Feng Jean, Chang-Chu Liao