Abstract: A thin film transistor (TFT) array substrate and a method of manufacturing the same that is capable of decreasing the number of usage of exposure masks to reduce the process time and the process costs and excessively etching a passivation film below a photoresist pattern to easily perform a lift-off process of the photoresist pattern are disclosed.

Abstract: Some embodiments concern a kernel bus system for building at least one virtual machine monitor. The kernel bus system is based on kernel-based virtual machine. The kernel bus system is configured to run on a host computer. The host computer comprising one or more processors, one or more hardware devices, and memory.

Abstract: A direction light and illumination device for bicycle includes a direction light unit arranged to a bicycle handling and a rear portion of a bicycle frame. The direction light unit includes a front support, a rear support, a front left light, a front right light, a rear left light, a rear right light, and a controller. The front left light and the front right light are arranged to two ends of the front support. The rear left light and the rear right light are arranged to two ends of the rear support. The controller is electrically connected to all direction lights so as to light up both two right or left lights for indicating a turning direction for safety.

Abstract: A method of manufacturing an array substrate for a liquid crystal display device includes forming a gate electrode and a gate line on a substrate through a first mask process, forming a first insulating layer, an active layer, an ohmic contact layer, a buffer metallic layer, and a data line on the substrate including the gate electrode and the gate line through a second mask process, and forming a source electrode, a drain electrode, and a pixel electrode through a third mask process, the pixel electrode extending from the drain electrode, wherein the active layer is disposed over and within the gate electrode.

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, the thin film transistor being electrically connected to the gate line and the data line and a pixel electrode in the pixel region and connected to the thin film transistor, wherein the active layer is disposed over and within the gate electrode.

Abstract: The invention published here covers a virtual mobile infrastructure (VMI) and its base platform. The base platform comprises several hosts. On a host OS, a QEMU process is used to virtualize at least one guest cell phone operating system. A data center manages these cell phone OSes generated by this base platform, allocates the OSes to users, and allows communication between cell phone client and server via mobile terminal protocol similar to RDP. A virtual machine (VM) switch contains a method to use the VMI of this published invention, and to acquire adapted cell phone screen and inexpensive cell phone VM. In one embodiment, a VMI product is able to encapsulate the third-party VDI products (such as Citrix XenDesktop, LeoStream, etc.), henceforth to acquire screens from PC VM as well. Moreover, a VM manager allows administrators of enterprises or telcos to manage thousands of VMs.

Abstract: An array substrate for a liquid crystal display device includes a gate and a data lines on a substrate intersecting each other, the data line includes a first layer formed of a transparent conductive material and a second layer under the first layer; a thin film transistor including a gate electrode connected to the gate line formed at respective intersection of the gate and data lines, an insulating layer on the gate electrode, an active layer on the insulating layer disposed within the gate electrode, an etch stopper on the active layer, an ohmic contact layer on the etch stopper, a source electrode on the ohmic contact layer and connected to the first layer, a drain electrode spaced apart from the source electrode; a pixel electrode connected to the drain electrode, wherein the source, drain and pixel electrodes are formed of the same layer and material as the first layer.

Abstract: Described is a method for power sharing of a display wall, in particular of a LED display wall having a plurality of display modules, and a plurality of N power supply units, each for driving a number of display modules, whereby during a failure of a first power supply unit of the plurality of N power supply units, the outputs of other power supply units are linked together such that the module or modules driven by the first and failed power supply continue(s) to operate, by redistribution of power from the other power supply units. Power sharing is also described in the context of a method for controlling the status of a display wall, in particular of a LED display wall, controlled by a central unit. The method includes collecting status and/or diagnostic information of the display wall inputted to the central unit; converting the status and/or diagnostic information to a picture; and displaying the picture on the display wall.

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor connected to the gate line and the data line and including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, and a pixel electrode in the pixel region and connected to the thin film transistor, wherein the data line includes a transparent conductive layer and an opaque conductive layer, and each of the source and drain electrodes and the pixel electrode includes a transparent conductive layer.

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor connected to the gate line and the data line and including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, and a pixel electrode in the pixel region and connected to the thin film transistor, wherein the data line includes a transparent conductive layer and an opaque conductive layer, and each of the source and drain electrodes and the pixel electrode includes a transparent conductive layer.

Abstract: A liquid crystal display (LCD) includes: a first substrate divided into a pixel part and first and second pad parts; a gate electrode and a gate line formed at the pixel part of the first substrate; an active pattern formed as an island on the gate electrode and having a width smaller than the gate electrode; an insulation film formed on the first substrate and having first and second contact holes exposing source and drain regions of the active pattern, respectively; source and drain electrodes formed at the pixel part of the first substrate and electrically connected with the source and drain regions of the active pattern via the first and second contact holes; a data line formed at the pixel part of the first substrate and crossing the gate line to define a pixel region; an etch stopper positioned between the source and drain electrodes and formed as an insulation film; a pixel electrode electrically connected with the drain electrode; and a second substrate attached with the first substrate in a facing ma

Abstract: A liquid crystal display device according to the present invention includes a gate line on a substrate; a data line crossing the gate line with a gate insulating film to define a pixel area; a thin film transistor connected to the gate line and the data line; a semiconductor pattern overlapped along the data line; a double layer passivation film covering the data line and the thin film transistor, wherein layers of the passivation film have different etching rates; and a pixel electrode formed in a pixel hole penetrating an upper passivation film of the double layer passivation film and connected to a drain electrode of the thin film transistor exposed through a drain contact hole, the pixel electrode forming a border with the upper passivation film surrounding the pixel hole.

Abstract: The invention issued is a generalized application virtualization method for business use on the web and the mini server, including: (1) Initializing (which includes obtaining parameters, reading configuration file, and initializing a DDE service), application monitoring, registration and login. (2) Accessing to a server via Access Protocol from a client-side SOD controller (aka SOD client controller, or SOD controller). (3) Content selecting via keyword search, with the selected contents provided by the Content Management Protocol. (4) Choosing one of the available application virtualization methods according to bandwidth needed by the user and the resources consumed in the data center. (5) Binding of the executable software for the application virtualization method and the contents selected, and running of that executable software. (6) Metering and billing: Meter the start and end time of the execution of application virtualization method and calculate the billing.

Abstract: A thin film transistor (TFT) array substrate and a method of manufacturing the same that is capable of decreasing the number of usage of exposure masks to reduce the process time and the process costs and excessively etching a passivation film below a photoresist pattern to easily perform a lift-off process of the photoresist pattern are disclosed.

Abstract: An array substrate for an in-plane switching mode liquid crystal display device includes: a gate line on a substrate; a data line crossing the gate line to define a pixel region on the substrate; a common line parallel to and spaced apart from the gate line; a gate electrode connected to the gate line; a semiconductor layer disposed over the gate electrode, wherein an area of the semiconductor layer is less than an area of the gate electrode; a source electrode connected to the data line, and a drain electrode spaced apart from the source electrode, the source and drain electrodes disposed on the semiconductor layer; a plurality of pixel electrodes integrated with the drain electrode and extending from the drain electrode in the pixel region; and a plurality of common electrodes connected to the common line and alternately arranged with the plurality of pixel electrodes, wherein each of the source electrode, the drain electrode, the data line and the plurality of pixel electrodes are comprised from a first co

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor connected to the gate line and the data line and including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, and a pixel electrode in the pixel region and connected to the thin film transistor, wherein the data line includes a transparent conductive layer and an opaque conductive layer, and each of the source and drain electrodes and the pixel electrode includes a transparent conductive layer.

Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, the thin film transistor being electrically connected to the gate line and the data line and a pixel electrode in the pixel region and connected to the thin film transistor, wherein the active layer is disposed over and within the gate electrode.

Abstract: An array substrate for a liquid crystal display device includes a gate and a data lines on a substrate intersecting each other, the data line includes a first layer formed of a transparent conductive material and a second layer under the first layer; a thin film transistor including a gate electrode connected to the gate line formed at respective intersection of the gate and data lines, an insulating layer on the gate electrode, an active layer on the insulating layer disposed within the gate electrode, an etch stopper on the active layer, an ohmic contact layer on the etch stopper, a source electrode on the ohmic contact layer and connected to the first layer, a drain electrode spaced apart from the source electrode; a pixel electrode connected to the drain electrode, wherein the source, drain and pixel electrodes are formed of the same layer and material as the first layer.

Abstract: A reaction apparatus for atomic layer deposition includes a vacuum chamber having a gas inlet, a gas outlet, and a gas flow path for connecting the gas inlet and the gas outlet; a reactor located in the vacuum chamber, including a reaction chamber where a first gas, which is input through the gas flow path, reacts with a specimen in the reaction chamber, the reactor further including a gas distributor, which is located in the reaction chamber to evenly supply the gas; a specimen location controller for moving the specimen located in the vacuum chamber to the reaction chamber; and an analyzer, which is connected to the reaction chamber, for analyzing a second gas generated in the reaction chamber. The apparatus is able to deposit uniform atomic layers on a specimen by maintaining the pressure and flow of reactant gas and can deposit and analyze an atomic layer simultaneously.

Abstract: An X-ray photoelectron spectroscopy includes an X-ray generator generating an X-ray, a collimator collimating the X-ray generated in the X-ray generator, a monochromator for converting the collimated X-ray into a single wavelength X-ray and reflecting the single wavelength X-ray to a test sample, the monochromator being installed to be displaceable and rotatable in response to an irradiating direction of the X-ray, an analysis chamber in which the test sample is disposed, the analysis chamber being installed to be rotatable in response to the displacement of the monochromator so as to allow the single wavelength to be accurately irradiated to the test sample, an energy analyzer for measuring kinetic energy of an electron that is emitted from the test sample by the single wavelength X-ray, and an electron detector for detecting an electron passing to the energy analyzer.