Patents by Inventor Chang-Cheng Hung
Chang-Cheng Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11243573Abstract: A semiconductor package includes a flexible substrate and a semiconductor device. The flexible substrate includes a device bonding region and a device top metallization structure including a plurality of device signal lines and a plurality of device power lines extended beyond the device bonding region. The semiconductor device is disposed on the device bonding region and includes an interconnecting metallization structure and a passivation layer covering the interconnecting metallization structure and revealing a plurality of interconnect contacts of the interconnecting metallization structure, wherein the plurality of interconnect contacts electrically connected to one another through the device top metallization structure.Type: GrantFiled: April 28, 2020Date of Patent: February 8, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Tung Hsu, Chang-Cheng Hung, Tyrone Kuo
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Publication number: 20210333834Abstract: A semiconductor package includes a flexible substrate and a semiconductor device. The flexible substrate includes a device bonding region and a device top metallization structure including a plurality of device signal lines and a plurality of device power lines extended beyond the device bonding region. The semiconductor device is disposed on the device bonding region and includes an interconnecting metallization structure and a passivation layer covering the interconnecting metallization structure and revealing a plurality of interconnect contacts of the interconnecting metallization structure, wherein the plurality of interconnect contacts electrically connected to one another through the device top metallization structure.Type: ApplicationFiled: April 28, 2020Publication date: October 28, 2021Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: CHENG-TUNG HSU, Chang-Cheng Hung, Tyrone Kuo
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Patent number: 8624345Abstract: A mask substrate, photomask and method for forming the same are provided. The photomask includes a substantially light transparent substrate and a circuitry pattern disposed over the light transparent substrate. The circuitry pattern includes a phase shifting layer disposed over the substantially light transparent substrate. A substantially light shielding layer is disposed over the phase shifting layer. At least one barrier layer is disposed over the substantially light shielding layer. An uppermost portion of the substantially light shielding layer does not comprise anti-reflective properties and the at least one barrier layer comprises an uppermost hardmask layer and an underlying anti-reflective layer.Type: GrantFiled: June 1, 2012Date of Patent: January 7, 2014Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ken Wu, Hung-Chang Hsieh, Chang-Cheng Hung, Luke Hsu, Ren-Guey Hsieh, Hsin-Chang Lee, Chia-Jen Chen
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Patent number: 8617410Abstract: A method for inspecting semiconductor wafers patterned by a photomask includes loading a first wafer and scanning a first image of the first wafer, loading a second wafer and scanning a second image of the second wafer, comparing the first and second images, and classifying a difference detected between the first and second images as a potential defect on the photomask. The potential defect includes a haze defect on the photomask.Type: GrantFiled: October 13, 2011Date of Patent: December 31, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chang-Cheng Hung, Tsai-Sheng Gau
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Publication number: 20120237861Abstract: A mask substrate, photomask and method for forming the same are provided. The photomask includes a substantially light transparent substrate and a circuitry pattern disposed over the light transparent substrate. The circuitry pattern includes a phase shifting layer disposed over the substantially light transparent substrate. A substantially light shielding layer is disposed over the phase shifting layer. At least one barrier layer is disposed over the substantially light shielding layer. An uppermost portion of the substantially light shielding layer does not comprise anti-reflective properties and the at least one barrier layer comprises an uppermost hardmask layer and an underlying anti-reflective layer.Type: ApplicationFiled: June 1, 2012Publication date: September 20, 2012Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ken Wu, Hung-Chang Hsieh, Chang-Cheng Hung, Luke Hsu, Ren-Guey Hsieh, Hsin-Chang Lee, Chia-Jen Chen
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Patent number: 8198118Abstract: A mask and method for forming the same including carrying out a photolithographic patterning process the method including providing a substantially light transparent portion; forming a substantially light shielding layer disposed over the substantially light transparent portion; forming at least one barrier layer disposed over the substantially light shielding layer; forming a resist layer disposed over the at least one barrier layer; patterning the resist layer for producing a circuitry pattern; and, carrying out an etching process according to the circuitry pattern to expose a portion of the substantially light transparent portion to form a mask.Type: GrantFiled: October 31, 2006Date of Patent: June 12, 2012Assignee: Taiwan Semiconductor Manufacturing Co.Inventors: Ken Wu, Hung-Chang Hsieh, Chang-Cheng Hung, Luke Hsu, Ren-Guey Hsieh, Hsin-Chang Lee, Chia-Jen Chen
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Publication number: 20120027284Abstract: A method for inspecting semiconductor wafers patterned by a photomask includes loading a first wafer and scanning a first image of the first wafer, loading a second wafer and scanning a second image of the second wafer, comparing the first and second images, and classifying a difference detected between the first and second images as a potential defect on the photomask. The potential defect includes a haze defect on the photomask.Type: ApplicationFiled: October 13, 2011Publication date: February 2, 2012Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chang-Cheng Hung, Tsai-Sheng Gau
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Patent number: 8046860Abstract: A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.Type: GrantFiled: September 20, 2010Date of Patent: November 1, 2011Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Yuan Hsia, Chang-Cheng Hung, Chi-Lun Lu, Shih-Ming Chang, Wen-Chuan Wang, Yen-Bin Huang, Ching-Yu Chang, Chin-Hsiang Lin
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Patent number: 8038897Abstract: A method for inspecting semiconductor wafers patterned by a photomask includes loading a first wafer and scanning a first image of the first wafer, loading a second wafer and scanning a second image of the second wafer, comparing the first and second images, and classifying a difference detected between the first and second images as a potential defect on the photomask. The potential defect includes a haze defect on the photomask.Type: GrantFiled: February 6, 2007Date of Patent: October 18, 2011Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chang-Cheng Hung, Tsai-Sheng Gau
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Publication number: 20110005010Abstract: A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.Type: ApplicationFiled: September 20, 2010Publication date: January 13, 2011Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chen-Yuan Hsia, Chang-Cheng Hung, Chi-Lun Lu, Shih-Ming Chang, Wen-Chuan Wang, Yen-Bin Huang, Ching-Yu Chang, Chin-Hsiang Lin
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Patent number: 7819980Abstract: A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.Type: GrantFiled: August 16, 2005Date of Patent: October 26, 2010Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Yuan Hsia, Chang-Cheng Hung, Chi-Lun Lu, Shih-Ming Chang, Wen-Chuan Wang, Yen-Bin Huang, Ching-Yu Chang, Chin-Hsiang Lin
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Patent number: 7759136Abstract: A method for patterning a substrate includes forming a material layer on the substrate; performing a first etching on the material layer to form a pattern; measuring the pattern of the material layer using an optical spectrum metrology tool; determining whether the measuring indicates that the etching step achieved a predefined result; and producing an etching recipe and performing a second etching of the material layer using the etching recipe if the predefined result was not achieved.Type: GrantFiled: September 8, 2006Date of Patent: July 20, 2010Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chang-Cheng Hung, Hung Chang Hsieh, Shih-Ming Chang, Wen-Chuan Wang, Chi-Lun Lu, Allen Hsia, Yen-Bin Huang
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Patent number: 7469057Abstract: A method and system is disclosed for inspecting defects on a wafer. After acquiring at least one digitized image of at least one portion of a wafer, at least one design database file corresponding to the portion of the wafer is converted into at least one inspection file. After setting one or more error detection thresholds, the digitized image and the inspection file are compared by an inspection tool for detecting defects with regard to the portion of the wafer based on the set error detection thresholds.Type: GrantFiled: February 18, 2004Date of Patent: December 23, 2008Assignee: Taiwan Semiconductor Manufacturing CorpInventors: Chang-Cheng Hung, Hung-Chang Hsieh, Hsen-Lin Wu, Tyng-Hao Hsu
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Patent number: 7460251Abstract: A system and method are disclosed for monitoring a dimensional change of a pattern for an object having a transparent layer exposed through the pattern and a non-transparent pattern laminated therewith. According to the method, a first beam is projected to the pattern. A second beam resulted from the first beam passing through the transparent layer exposed by the pattern, or from the first beam reflected from the non-transparent layer of the pattern, is detected. A value of a predetermined property from the second beam detected is obtained. A variation of the value is monitored for identifying the dimensional change of the pattern.Type: GrantFiled: October 5, 2005Date of Patent: December 2, 2008Assignee: Taiwan Semiconductor Manufacturing Co.Inventors: Shih-Ming Chang, Chen-Yuan Hsia, Wen-Chuan Wang, Chi-Lun Lu, Yen-Bin Huang, Chang-Cheng Hung, Chia-Jen Chen, Kai-Chung Liu, Hsin-Chang Lee, Hong-Chang Hsieh
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Publication number: 20080187842Abstract: A method for inspecting semiconductor wafers patterned by a photomask includes loading a first wafer and scanning a first image of the first wafer, loading a second wafer and scanning a second image of the second wafer, comparing the first and second images, and classifying a difference detected between the first and second images as a potential defect on the photomask. The potential defect includes a haze defect on the photomask.Type: ApplicationFiled: February 6, 2007Publication date: August 7, 2008Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chang-Cheng Hung, Tsai-Sheng Gau
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Publication number: 20080102379Abstract: A mask and method for forming the same including carrying out a photolithographic patterning process the method including providing a substantially light transparent portion; forming a substantially light shielding layer disposed over the substantially light transparent portion; forming at least one barrier layer disposed over the substantially light shielding layer; forming a resist layer disposed over the at least one barrier layer; patterning the resist layer for producing a circuitry pattern; and, carrying out an etching process according to the circuitry pattern to expose a portion of the substantially light transparent portion to form a mask.Type: ApplicationFiled: October 31, 2006Publication date: May 1, 2008Inventors: Ken Wu, Hung-Chang Hsieh, Chang-Cheng Hung, Luke Hsu, Ren-Guey Hsieh, Hsin-Chang Lee, Chia-Jen Chen
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Publication number: 20070231935Abstract: A method for patterning a substrate includes forming a material layer on the substrate; performing a first etching on the material layer to form a pattern; measuring the pattern of the material layer using an optical spectrum metrology tool; determining whether the measuring indicates that the etching step achieved a predefined result; and producing an etching recipe and performing a second etching of the material layer using the etching recipe if the predefined result was not achieved.Type: ApplicationFiled: September 8, 2006Publication date: October 4, 2007Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chang-Cheng HUNG, Hung Chang HSIEH, Shih-Ming CHANG, Wen-Chuan WANG, Chi-Lun LU, Allen HSIA, Yen-Bin HUANG
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Publication number: 20070075037Abstract: A system and method are disclosed for monitoring a dimensional change of a pattern for an object having a transparent layer exposed through the pattern and a non-transparent pattern laminated therewith. According to the method, a first beam is projected to the pattern. A second beam resulted from the first beam passing through the transparent layer exposed by the pattern, or from the first beam reflected from the non-transparent layer of the pattern, is detected. A value of a predetermined property from the second beam detected is obtained. A variation of the value is monitored for identifying the dimensional change of the pattern.Type: ApplicationFiled: October 5, 2005Publication date: April 5, 2007Inventors: Shih-Ming Chang, Chen-Yuan Hsia, Wen-Chuan Wang, Chi-Lun Lu, Yen-Bin Huang, Chang-Cheng Hung, Chia-Jen Chen, Kai-Chung Liu, Hsin-Chang Lee, Hong Hsieh
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Publication number: 20070039631Abstract: A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.Type: ApplicationFiled: August 16, 2005Publication date: February 22, 2007Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Yuan Hsia, Chang-Cheng Hung, Chi-Lun Lu, Shih-Ming Chang, Wen-Chuan Wang, Yen-Bin Huang, Ching-Yu Chang, Chin-Hsiang Lin
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Patent number: 7162071Abstract: A progressive self-learning (PSL) method is provided for enhancing wafer or mask defect inspection review and classification by identifying a plurality of wafer or mask defects, and by classifying each of the plurality of defects according to an extent of resemblance of each defect. The method having the steps of: performing image processing on a scanned defect image; aligning the scanned defect image with a just-stored digitized defect image; matching the scanned defect image with a just-stored digitized defect image; and classifying the scanned defect image.Type: GrantFiled: December 20, 2002Date of Patent: January 9, 2007Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chang-Cheng Hung, Tyng-Hao Hsu, Chin-Hsiang Lin, Chuan-Yuan Lin, Shin-Ying Chen