Patents by Inventor Chang Dae Kim

Chang Dae Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250147663
    Abstract: Disclosed herein is an apparatus and method for processing write-on-copy for supporting a fork in a memory disaggregation system. The method includes, when a child process is generated in the event of a fork, processing the fork by copying a page table for disaggregated memory of a parent process to the child process and setting write protection on a page of the disaggregated memory; and processing write access to the write-protected page. Processing the write access may use at least one of a first handler corresponding to access to the write-protected page mapped to the page table, or a second handler corresponding to the write access to the write-protected page that is not mapped to the page table, or a combination thereof.
    Type: Application
    Filed: November 4, 2024
    Publication date: May 8, 2025
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chang-Dae KIM, Kwang-Won Koh, Tae-Hoon Kim, Eun-Ji Pak, Yeon-Jeong Jeong
  • Publication number: 20250147680
    Abstract: Disclosed herein is a method for memory management in a memory disaggregation environment. The method includes generating virtual memory based on multiple first memory devices, determining whether a condition for allocation acceleration is satisfied by the first memory devices, and allocating a memory page to the first memory devices based on whether the condition for allocation acceleration is satisfied.
    Type: Application
    Filed: January 9, 2025
    Publication date: May 8, 2025
    Applicants: Electronics and Telecommunications Research Institute, SYSGEAR CO., Ltd.
    Inventors: Chang-Dae KIM, Kwang-Won KOH, Kang-Ho KIM, Tae-Hoon KIM, Sang-Ho EOM
  • Publication number: 20250121328
    Abstract: A particulate filter connecting structure of an exhaust gas post processing system that engages flanges provided in a particulate filter and catalyst devices adjacent to the particulate filter through a clamp is provided. The particulate filter connecting structure includes a gasket interposed between the flanges and is formed with a bead portion curved convexly into a round shape.
    Type: Application
    Filed: August 28, 2024
    Publication date: April 17, 2025
    Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION
    Inventors: Chang Dae KIM, Jong Suk KIM
  • Publication number: 20250077340
    Abstract: Disclosed herein is a method for managing memory in a memory disaggregation environment. The method includes handling a required subblock within a block more preferentially than an additional block in the event of a page fault and handling a page fault for the block in which the required subblock is preferentially processed.
    Type: Application
    Filed: July 29, 2024
    Publication date: March 6, 2025
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Tae-Hoon KIM, Kwang-Won KOH, Chang-Dae KIM, Eun-Ji PAK, Yeon-Jeong JEONG, Sang-Hoon KIM
  • Publication number: 20250077261
    Abstract: Disclosed herein is a method for improving performance of a hypervisor in a memory disaggregation environment. The method includes allocating memory pages to a virtual machine in preset units, comparing the address range of the page frame to be returned with a preset page size, and removing an address space mapping for the page frame to be returned depending on a result of comparison with the preset page size. Removing the address space mapping comprises removing the address space mapping on the basis of contiguous page frames when the range of the page frame to be returned is equal to or greater than the preset page size.
    Type: Application
    Filed: June 18, 2024
    Publication date: March 6, 2025
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Tae-Hoon KIM, Kwang-Won KOH, Chang-Dae KIM, Eun-Ji PAK, Yeon-Jeong JEONG, Sang-Hoon KIM
  • Patent number: 12223186
    Abstract: Disclosed herein is a method for memory management in a memory disaggregation environment. The method includes generating virtual memory based on multiple first memory devices, determining whether a condition for allocation acceleration is satisfied by the first memory devices, and allocating a memory page to the first memory devices based on whether the condition for allocation acceleration is satisfied.
    Type: Grant
    Filed: March 24, 2023
    Date of Patent: February 11, 2025
    Assignees: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, SYSGEAR CO., LTD.
    Inventors: Chang-Dae Kim, Kwang-Won Koh, Kang-Ho Kim, Tae-Hoon Kim, Sang-Ho Eom
  • Patent number: 12153525
    Abstract: Disclosed herein are a method and apparatus for verifying integrity in a memory-disaggregated environment. The method for verifying integrity in a memory-disaggregated environment includes receiving write data and multiple hash values generated based on write data from a remote memory, and verifying integrity of the write data based on the write data and the hash values, wherein verifying the integrity of the write data comprises selecting a hash value for the integrity verification based on an access latency of the remote memory.
    Type: Grant
    Filed: March 24, 2023
    Date of Patent: November 26, 2024
    Assignees: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, SYSGEAR CO., LTD.
    Inventors: Tae-Hoon Kim, Kwang-Won Koh, Kang-Ho Kim, Chang-Dae Kim, Sang-Ho Eom
  • Patent number: 11947463
    Abstract: Disclosed herein is an apparatus for managing disaggregated memory, which is located in a virtual machine in a physical node. The apparatus is configured to select, depending on the proportion of valid pages, direct transfer between remote memory units or indirect transfer via local memory for each of the memory pages of the source remote memory to be migrated, among at least one remote memory unit used by the virtual machine, to transfer the memory pages of the source remote memory to target remote memory based on the direct transfer or the indirect transfer, and to release the source remote memory.
    Type: Grant
    Filed: January 24, 2023
    Date of Patent: April 2, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang-Won Koh, Chang-Dae Kim, Kang-Ho Kim
  • Patent number: 11849005
    Abstract: Disclosed herein are a method and apparatus for accelerating network transmission in a memory-disaggregated environment. The method for accelerating network transmission in a memory-disaggregated environment includes copying transmission data to a transmission buffer of the computing node, when a page fault occurs during copy of the transmission data, identifying a location at which the transmission data is stored, setting a node in which a largest amount of transmission data is stored as a transmission node, and sending a transmission command to the transmission node.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: December 19, 2023
    Assignees: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, SYSGEAR CO., LTD.
    Inventors: Kwang-Won Koh, Kang-Ho Kim, Chang-Dae Kim, Tae-Hoon Kim, Sang-Ho Eom
  • Publication number: 20230305721
    Abstract: Disclosed herein is a method for memory management in a memory disaggregation environment. The method includes generating virtual memory based on multiple first memory devices, determining whether a condition for allocation acceleration is satisfied by the first memory devices, and allocating a memory page to the first memory devices based on whether the condition for allocation acceleration is satisfied.
    Type: Application
    Filed: March 24, 2023
    Publication date: September 28, 2023
    Applicants: Electronics and Telecommunications Research Institute, SYSGEAR CO., LTD.
    Inventors: Chang-Dae KIM, Kwang-Won KOH, Kang-Ho KIM, Tae-Hoon KIM, Sang-Ho EOM
  • Publication number: 20230305964
    Abstract: Disclosed herein are a method and apparatus for verifying integrity in a memory-disaggregated environment. The method for verifying integrity in a memory-disaggregated environment includes receiving write data and multiple hash values generated based on write data from a remote memory, and verifying integrity of the write data based on the write data and the hash values, wherein verifying the integrity of the write data comprises selecting a hash value for the integrity verification based on an access latency of the remote memory.
    Type: Application
    Filed: March 24, 2023
    Publication date: September 28, 2023
    Applicants: Electronics and Telecommunications Research Institute, SYSGEAR CO., LTD.
    Inventors: Tae-Hoon KIM, Kwang-Won KOH, Kang-Ho KIM, Chang-Dae KIM, Sang-Ho EOM
  • Publication number: 20230196157
    Abstract: A quantum simulation apparatus according to an embodiment of the present disclosure includes a quantum circuit distributor configured to receive and transfer a plurality of quantum circuits, and a multi-quantum register controller configured to control independent allocation and execution of the input quantum circuits into multi-quantum registers supporting a reduced quantum state space, wherein the multi-quantum register provides the reduced quantum state space with respect to a real quantum state having a physical reality with an amplitude value that is not 0 in a wide-area quantum state space.
    Type: Application
    Filed: July 20, 2022
    Publication date: June 22, 2023
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Ki Sung JIN, Gyu Il CHA, Chang Dae KIM
  • Publication number: 20230176893
    Abstract: Disclosed herein are a method and apparatus for migrating a virtual machine in a memory-disaggregated environment. The method for migrating a virtual machine in a memory-disaggregated environment includes determining whether to migrate a virtual machine based on a number of accesses to a remote memory, establishing a migration policy for the virtual machine based on a remote memory access pattern, and determining a migration destination node based on the migration policy, wherein the migration policy includes a first migration policy corresponding to a case where the remote memory access pattern is sequential, and a second migration policy corresponding to a case where the remote memory access pattern is non-sequential.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 8, 2023
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, SYSGEAR CO., LTD.
    Inventors: Kwang-Won KOH, Kang-Ho KIM, Chang-Dae KIM, Tae-Hoon KIM, Sang-Ho EOM
  • Publication number: 20230179679
    Abstract: Disclosed herein are a method and apparatus for accelerating network transmission in a memory-disaggregated environment. The method for accelerating network transmission in a memory-disaggregated environment includes copying transmission data to a transmission buffer of the computing node, when a page fault occurs during copy of the transmission data, identifying a location at which the transmission data is stored, setting a node in which a largest amount of transmission data is stored as a transmission node, and sending a transmission command to the transmission node.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 8, 2023
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, SYSGEAR CO., LTD.
    Inventors: Kwang-Won KOH, Kang-Ho KIM, Chang-Dae KIM, Tae-Hoon KIM, Sang-Ho EOM
  • Patent number: 11586549
    Abstract: Disclosed herein is an apparatus for managing disaggregated memory, which is located in a virtual machine in a physical node. The apparatus is configured to select, depending on the proportion of valid pages, direct transfer between remote memory units or indirect transfer via local memory for each of the memory pages of the source remote memory to be migrated, among at least one remote memory unit used by the virtual machine, to transfer the memory pages of the source remote memory to target remote memory based on the direct transfer or the indirect transfer, and to release the source remote memory.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: February 21, 2023
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang-Won Koh, Chang-Dae Kim, Kang-Ho Kim
  • Publication number: 20220392578
    Abstract: Disclosed herein are an apparatus and method for accelerating genome sequence alignment. The method may include loading an essential index for a reference genome into memory, loading an additional index corresponding to the amount of available memory into memory, reading a target nucleotide sequence for which genome sequence alignment is to be performed, checking whether an exact match of the target nucleotide sequence is present in the reference genome based on the additional index, and generating a result of alignment of the target nucleotide sequence using the location of the exact match of the target nucleotide sequence in the reference genome when an exact match is found.
    Type: Application
    Filed: June 3, 2022
    Publication date: December 8, 2022
    Inventors: Chang-Dae KIM, Kwang-Won KOH, Kang-Ho KIM, Tae-Hoon KIM
  • Publication number: 20210390056
    Abstract: Disclosed herein is an apparatus for managing disaggregated memory, which is located in a virtual machine in a physical node. The apparatus is configured to select, depending on the proportion of valid pages, direct transfer between remote memory units or indirect transfer via local memory for each of the memory pages of the source remote memory to be migrated, among at least one remote memory unit used by the virtual machine, to transfer the memory pages of the source remote memory to target remote memory based on the direct transfer or the indirect transfer, and to release the source remote memory.
    Type: Application
    Filed: May 19, 2021
    Publication date: December 16, 2021
    Inventors: Kwang-Won KOH, Chang-Dae KIM, Kang-Ho KIM
  • Publication number: 20160326934
    Abstract: The present disclosure provides a control method for informing a driver when to clean a diesel particulate filter (DPF). The control method for informing a driver when to clean a diesel particulate filter may include informing a driver of the time when to clean the DPF by operating a warning device depending on at least one of a differential pressure of the DPF and engine oil consumption.
    Type: Application
    Filed: October 13, 2015
    Publication date: November 10, 2016
    Applicant: HYUNDAI MOTOR COMPANY
    Inventor: Chang Dae KIM
  • Patent number: 8402754
    Abstract: An apparatus for purifying exhaust gas may include a CPF device primarily oxidizing hydrocarbon and carbon monoxide in the exhaust gas by using a first DOC, and trapping and regenerating particulate material (PM), a DOC device mounted downstream of the CPF device, secondarily oxidizing the HC and the CO in the primarily oxidized exhaust gas by using a second DOC, and oxidizing nitrogen monoxide into nitrogen dioxide by using the second DOC, a nozzle mounted downstream of the DOC device, and dosing a reducing agent to the exhaust gas secondarily oxidized by the DOC device, and a selective catalytic reduction device mounted downstream of the nozzle, and reducing nitrogen oxide in the exhaust gas into nitrogen gas) by using the NO2 generated in the DOC device and the reducing agent.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: March 26, 2013
    Assignee: Hyundai Motor Company
    Inventors: Chang Dae Kim, Jim Ha Lee, Ji Ho Cho, Ki Hyung Joo, Jin Woo Choung
  • Patent number: 8336295
    Abstract: An apparatus for reducing nitrogen oxide in an exhaust pipe, may include a nitrogen oxide sensor that is mounted in the exhaust pipe and that measures amount of the nitrogen oxide in exhaust gas, a nozzle that is disposed on the exhaust pipe to be spaced apart from the nitrogen oxide sensor to a downstream side of the nitrogen oxide sensor by a first predetermined length and that injects urea corresponding to the amount of the nitrogen oxide, a mixer that mixes the urea with the exhaust gas and that is disposed at a downstream side of the nozzle on the exhaust pipe to be spaced apart by a second predetermined length from the nozzle, and a de-nitrification catalyst reaction device that is disposed at a downstream side of the mixer on the exhaust pipe, purifies the nitrogen oxide, and includes an inlet portion having a predetermined length.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: December 25, 2012
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventor: Chang Dae Kim