Abstract: A first planarization layer, an anode lap joint later, a pixel defining layer are between the first dam and the display area; the anode lap joint layer includes a main body portion and sharp angle portions; the sharp angle portion at least includes a first side edge close to the display area; the pixel defining layer wraps a border of the anode lap joint layer and has a first groove extending from one to the other sharp angle portion. An edge of the first groove adjacent to the first side edge of the sharp angle portion is a second side edge; and an orthographic projection of the second side edge on a base substrate is in an orthographic projection of the third groove on the base substrate.

Abstract: A display substrate includes a base substrate, multiple sub-pixels, multiple first gate drive circuits, and at least one auxiliary structure. The base substrate includes a display region and a peripheral region located at a periphery of the display region. The multiple sub-pixels are located in the display region. The multiple first gate drive circuits and the at least one auxiliary structure are located in the peripheral region. The multiple first gate drive circuits are configured to provide first gate drive signals to the multiple sub-pixels. One auxiliary structure is disposed between adjacent first gate drive circuits.

Abstract: A bio-information detection substrate and a gene chip are provided. The substrate includes a first main surface, the first main surface includes a test region and a dummy region located around the test region, at least one accommodation region is disposed on the first main surface, and the accommodation region is located in the dummy region.

Abstract: A bio-information detection substrate and a gene chip are provided. The substrate includes a first main surface, the first main surface includes a test region and a dummy region located around the test region, at least one accommodation region is disposed on the first main surface, and the accommodation region is located in the dummy region.

Abstract: The present invention discloses a method for removing carbon monoxide (CO) from a gas mixture containing CO including contacting the gas mixture with a nano-gold catalyst to reduce the CO content in the gas mixture by CO selective adsorption/oxidation, water gas shift reaction or CO selective oxidation reaction. The nano-gold catalyst includes a solid support and gold deposited on the support, wherein the deposited gold has a size less than 10 nm, and the support is a mixed metal hydroxide and oxide having the following formula: M(OH)qOy Wherein M is Ti, Fe, Co, Zr, or Ni; q is 0.1-1.5; and q+2y=z, wherein z is the valence of M.

Abstract: The present invention discloses a method for removing carbon monoxide (CO) from a gas mixture containing CO including contacting the gas mixture with a nano-gold catalyt to reduce the CO content in the gas mixture by CO selective adsorption/oxidation, water gas shift reaction or CO selective oxidation reaction. The nano-gold catalyst includes a solid support and gold deposited on the support, wherein the deposited gold has a size less than 10 nm, and the support is a mixed metal hydroxide and oxide having the following formula: M(OH)qOy Wherein M is Ti, Fe, Co, Zr, or Ni; q is 0.1-1.5; and q+2y=z, wherein z is the valence of M.

Abstract: The present invention discloses a nano-gold catalyst including a solid carrier and gold deposited on the carrier, wherein the deposited gold has a size less than 10 nm, and the carrier is a mixed metal hydroxide and oxide having the following formula: M(OH)qOy Wherein M is Ti, Fe, Co, Zr, or Ni; q is 0.1-1.5; and q+2y=z, wherein z is the valence of M. The present invention also discloses a preparation process of the nano-gold catalyst.

Abstract: The present invention discloses a nano-gold catalyst including a solid carrier and gold deposited on the carrier, wherein the deposited gold has a size less than 10 nm, and the carrier is a mixed metal hydroxide and oxide having the following formula:

Abstract: A method for producing maleimides. The method comprises reacting maleic anhydride and a primary amine at 100-180° C. in an organic solvent using a solid acidic catalyst, and purifying the maleimide produced therefrom by extraction and crystallization. The molar ratio of the primary amine to maleic anhydride is about 0.8-1.6. With the present invention, high production yield with high purity of maleimides can be achieved. In addition, the solid acidic catalyst can be easily separated and recycled for subsequent use. Thus, the present invention provides a number of distinct advantages, including substantially improved yield, conveniently reusable catalyst, reduced waste disposal and lower costs.

Abstract: A method for producing maleimides. The method comprises reacting maleic anhydride and a primary amine at 100-180° C. in an organic solvent using a solid acidic catalyst, and purifying the maleimide produced therefrom by extraction and crystallization. The molar ratio of the primary amine to maleic anhydride is about 0.8-1.6. With the present invention, high production yield with high purity of maleimides can be achieved. In addition, the solid acidic catalyst can be easily separated and recycled for subsequent use. Thus, the present invention provides a number of distinct advantages, including substantially improved yield, conveniently reusable catalyst, reduced waste disposal and lower costs.

Abstract: A process for globally planarizing the insulator used to fill narrow and wide shallow trenches, used in a MOSFET device, structure, has been developed. The process features smoothing the topography that exists after the insulator filling of narrow and shallow trenches, via use of a two layer planarization composite, consisting of an underlying, anti-reflective coating, which enhances the flow of an overlying photoresist layer. A two phase, RIE procedure is then employed, with the initial phase exposing thick insulator in narrow shallow trench regions, but leaving the two layer planarization composite protecting the thinner insulator in the wide shallow trenches. The second phase of the RIE procedure removes thick insulator, overlying the narrow shallow trenches, resulting in a planarized topography.

Abstract: A process for globally planarizing the insulator used to fill narrow and wide shallow trenches, used in a MOSFET device, structure, has been developed. The process features smoothing the topography that exists after the insulator filling of narrow and shallow trenches, by creating photoresist plugs, only in the depressed topography regions. This is accomplished using a negative photoresist layer, a de-focus exposure, and the identical mask used to create the shallow trench pattern in a positive photoresist layer. A RIE procedure, with a 1:1 etch selectivity, is used to complete the planarization process.

Abstract: The present invention relates to a method for the production of N-vinyl-2-pyrrolidone with high selectivity. The method is characterized in subjecting 2-pyrrolidone and acetylene to vinylation by using hydroxy end-capped ether oligomers having a molecular weight less than 1000 or linear diols having at least 4 carbon atoms as co-catalysts under the catalyzation of alkali metal salts. At a vinylation temperature of 100.degree.-200 .degree. C., a reaction pressure of 7.5-30 atm and a reaction time period of 3-20 hours, N-vinyl-2-pyrrolidones are obtained with yields above 90%.

Abstract: The present invention relates to a method for the production of N-vinyl-2-pyrrolidone by gas-phase reaction at atmospheric pressure. The method is characterized in that a gas-phase reaction is conducted by using N-.beta.-Hydroxyethyl-2-Pyrrolidones serving as raw materials, at a temperature of 300.degree.-450.degree. C., a space velocity of 500-4500 hr.sup.-1 in the presence of a mixed oxide of group IV elements, or an oxide of group IV elements, which has been modified by group I or group II elements.