Patents by Inventor Chang Hsu
Chang Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12379675Abstract: An extreme ultraviolet (EUV) lithography system includes a vane bucket module. The vane bucket module includes a temperature adjusting pack and a collecting tank inserted into the temperature adjusting pack. The temperature adjusting pack has a plurality of inlets. The collecting tank has a cover and the cover includes a plurality of through holes. The inlets of the temperature adjusting pack are aligned with the through holes of the cover. Each through hole has a minimum depth at a first position and a maximum depth at a second position. The first position is closer to a center of the cover than the second position.Type: GrantFiled: July 2, 2024Date of Patent: August 5, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ssu-Yu Chen, Po-Chung Cheng, Li-Jui Chen, Che-Chang Hsu, Chi Yang
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Publication number: 20250228138Abstract: A semiconductor device includes an array region defined on a substrate, a ring of dummy pattern surrounding the array region, and a gap between the array region and the ring of dummy pattern. Preferably, the ring of dummy pattern further includes a ring of magnetic tunneling junction (MTJ) pattern surrounding the array region and a ring of metal interconnect pattern overlapping the ring of MTJ and surrounding the array region.Type: ApplicationFiled: March 26, 2025Publication date: July 10, 2025Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chih-Wei Kuo, Chia-Chang Hsu
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Patent number: 12354371Abstract: An object detection system of a vehicle includes a camera and a LIDAR sensor. The camera and the LIDAR sensor sense an environment to generate an image and a point cloud that depict the environment. The image and point cloud are preprocessed to facilitate comparison between the image and the point cloud. Similarity between the image and the point cloud in depicting the environment is determined to detect abnormal sensor data. Abnormal sensor data is further detected based on directional pattern strengths of edges of the image and expanded points of the point cloud. Detected abnormal sensor data in the image and point cloud are filtered to generate a secure image and a secure point cloud, which are provided to a perception engine to detect objects or other features in the environment.Type: GrantFiled: November 10, 2022Date of Patent: July 8, 2025Assignee: VicOne CorporationInventors: Yi-Li Cheng, Jui Chang Hsu, Shih-Han Hsu
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Publication number: 20250216791Abstract: A method for manufacturing a photomask is provided. The method includes: forming a target layer over a substrate; forming a patterned photoresist layer over the target layer; applying ozonated deionized water to oxidize organic materials over the substrate; applying an alkaline solution to soften the patterned photoresist layer after applying the ozonated deionized water; and removing the softened patterned photoresist layer by mechanical impact.Type: ApplicationFiled: March 18, 2025Publication date: July 3, 2025Inventors: YU-HSIN HSU, HAO-MING CHANG, SHAO-CHI WEI, SHENG-CHANG HSU, CHENG-MING LIN
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Patent number: 12322988Abstract: A device for achieving dynamic charging and balance of battery cells is disclosed. The device is configured for monitoring a plurality of battery voltages from a plurality of battery cells in a multi-cell battery pack. In case of a battery voltage difference between two of the battery cells being greater than a pre-determined voltage difference, the device generates a plurality of balance charging currents for charging the battery cells. In which, each of the balance charging currents is calculated based on remaining charge time, measured battery voltage, and rated battery capacity. Thus, in a charge cycle, one balance charging current for charging the battery cell with low battery voltage is designed to be greater than another one balance charging current for charging the battery cell with high battery voltage. Consequently, elimination of the battery voltage difference existing between any two of the battery cells is achieved.Type: GrantFiled: March 11, 2022Date of Patent: June 3, 2025Assignee: PROLIFIC TECHNOLOGY INC.Inventor: Chia-Chang Hsu
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Publication number: 20250170813Abstract: A composite film, a decorative film and a method of decorating a target substrate are provided. The composite film includes a substrate and a transfer layer disposed on a surface of the substrate. The transfer layer has a loss factor (tan ?) in a range between 0.015 and 0.1. The composite film is configured to prepare a laminated thin film, a cold pressed film and a hot pressed film. By controlling property of the transfer layer, material cost of the processes for decorating the target substrate and procedure of waste treatment can be decreased.Type: ApplicationFiled: November 28, 2024Publication date: May 29, 2025Inventors: Ming Chieh KUO, Yin Yung LIN, Chao Wei LIU, Yu Chang HSU, Chien Liang KUO
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Publication number: 20250169632Abstract: A teapot capable of preventing the teapot lid from falling off, which has the teapot lid provided with a chute and the teapot body provided with a sliding protrusion on the inner wall. The chute forms an angle with respect to the central axis of the sliding protrusion, preventing the teapot lid from being displaced relative to the teapot mouth. When the user pours tea from the teapot, the teapot lid will not fall off or spill due to tipping or slight collision. On the contrary, when the tea pouring process is finished, the user can gently turn the teapot lid with his hand, and at the same time drive the chute to leave the sliding protrusion, and the teapot lid can leave the teapot mouth.Type: ApplicationFiled: November 20, 2024Publication date: May 29, 2025Inventor: Tien-Chang HSU
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Publication number: 20250164892Abstract: A method and system for optimizing scan speed of a lithography scanner. A process design layout corresponding to a plurality of rows of fields to be formed on an associated wafer is received and a default machine constant of the lithography scanner is determined. Each of the plurality of rows is then identified corresponding to the received process design layout. A scan speed for each determined type of row and the determined default machine constant is then determined. The associated wafer is then processed utilizing the determined scan speed for each of the plurality of rows in accordance with the process design layout.Type: ApplicationFiled: November 17, 2023Publication date: May 22, 2025Inventors: Kai-Chieh Chang, Che-Chang Hsu, Kai-Fa Ho, Li-Jui Chen
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Patent number: 12290004Abstract: A semiconductor device includes an array region defined on a substrate, a ring of dummy pattern surrounding the array region, and a gap between the array region and the ring of dummy pattern. Preferably, the ring of dummy pattern further includes a ring of magnetic tunneling junction (MTJ) pattern surrounding the array region and a ring of metal interconnect pattern overlapping the ring of MTJ and surrounding the array region.Type: GrantFiled: May 26, 2024Date of Patent: April 29, 2025Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chih-Wei Kuo, Chia-Chang Hsu
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Patent number: 12282260Abstract: A method for cleaning is provided. The method includes: removing a pellicle frame from a top surface of a photomask by debonding an adhesive between the photomask and the pellicle frame, wherein a first portion of the adhesive is remained on the top surface of the photomask, and removing the first portion of the adhesive on the top surface of the photomask, including applying an alkaline solution to the top surface of the photomask, and performing a mechanical impact to the photomask.Type: GrantFiled: December 23, 2021Date of Patent: April 22, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yu-Hsin Hsu, Hao-Ming Chang, Shao-Chi Wei, Sheng-Chang Hsu, Cheng-Ming Lin
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Patent number: 12278277Abstract: A method for manufacturing a semiconductor device includes forming a first dielectric layer over a semiconductor fin. The method includes forming a second dielectric layer over the first dielectric layer. The method includes exposing a portion of the first dielectric layer. The method includes oxidizing a surface of the second dielectric layer while limiting oxidation on the exposed portion of the first dielectric layer.Type: GrantFiled: February 16, 2024Date of Patent: April 15, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Liang Pan, Yung Tzu Chen, Chung-Chieh Lee, Yung-Chang Hsu, Chia-Yang Hung, Po-Chuan Wang, Guan-Xuan Chen, Huan-Just Lin
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Publication number: 20250110414Abstract: Some implementations described herein provide a reticle cleaning device and a method of use. The reticle cleaning device includes a support member configured for extension toward a reticle within an extreme ultraviolet lithography tool. The reticle cleaning device also includes a contact surface disposed at an end of the support member and configured to bond to particles contacted by the contact surface. The reticle cleaning device further includes a stress sensor configured to measure an amount of stress applied to the support member at the contact surface. During a cleaning operation in which the contact surface is moving toward the reticle, the stress sensor may provide an indication that the amount of stress applied to the support member satisfies a threshold. Based on satisfying the threshold, movement of the contact surface and/or the support member toward the reticle ceases to avoid damaging the reticle.Type: ApplicationFiled: December 12, 2024Publication date: April 3, 2025Inventors: Che-Chang HSU, Sheng-Kang YU, Shang-Chieh CHIEN, Li-Jui CHEN, Heng-Hsin LIU
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Patent number: 12265336Abstract: An exposure tool is configured to remove contaminants and/or prevent contamination of mirrors and/or other optical components included in the exposure tool. In some implementations, the exposure tool is configured to flush and/or otherwise remove contaminants from an illuminator, a projection optics box, and/or one or more other subsystems of the exposure tool using a heated gas such as ozone (O3) or extra clean dry air (XCDA), among other examples. In some implementations, the exposure tool is configured to provide a gas curtain (or gas wall) that includes hydrogen (H2) or another type of gas to reduce the likelihood of contaminants reaching the mirrors included in the exposure tool. In this way, the mirrors and one or more other components of the exposure tool are cleaned and maintained in a clean environment in which radiation absorbing contaminants are controlled to increase the performance of the exposure tool.Type: GrantFiled: August 27, 2021Date of Patent: April 1, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kai-Chieh Chang, Che-Chang Hsu, Yen-Shuo Su, Chun-Lin Chang, Kai-Fa Ho, Li-Jui Chen, Heng-Hsin Liu
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Publication number: 20250102927Abstract: A method includes: forming a mask layer on a semiconductor wafer; generating light by a tin droplet by a lithography exposure system; exposing the mask layer by the light; cleaning tin debris accumulated in the lithography exposure system by hydrogen gas; pumping the hydrogen gas from the lithography exposure system to a fuel cell; and generating electric power by the fuel cell.Type: ApplicationFiled: September 22, 2023Publication date: March 27, 2025Inventors: Chien-Hua FU, Che-Chang HSU, Kai-Fa HO, Li-Jui CHEN
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Publication number: 20250091265Abstract: A method for manufacturing a keycap includes a plastic injection step that involves forming a keycap preform; a coating layer forming step that involves spraying a surface paint material onto a processing surface of the keycap preform to form a surface paint coating layer, which has an engraved marking portion; a protection layer forming step that involves spraying a protection material onto the surface paint coating layer to form a first protection layer; a laser engraving step that involves removing the engraved marking portion; and a screen printing step that involves forming a second protection layer on the processing surface.Type: ApplicationFiled: December 21, 2023Publication date: March 20, 2025Applicant: SUNREX TECHNOLOGY CORP.Inventors: Chia-Chang HSU, Chia-Hung TSAI
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Publication number: 20250094709Abstract: A method for performing multi-token prediction by an apparatus includes receiving, from an artificial intelligence (AI) assistance device, a request for an output token sequence that is subsequent to an input token sequence indicated by the request, predicting, by a trained machine learning model, a plurality of candidate output tokens, estimating joint probability distributions of one or more combinations of the plurality of candidate output tokens, calculating joint probabilities of the one or more combinations by masking the joint probability distributions with a co-occurrence weighted mask, determining, based on the joint probabilities, whether to reduce the number of candidate output tokens included in each combination of the one or more combinations, identifying, based on the joint probabilities, a combination of the one or more combinations as the output token sequence, and outputting, to the AI assistance device, a response to the request, the response comprising the output token sequence.Type: ApplicationFiled: September 6, 2024Publication date: March 20, 2025Applicant: Samsung Electronics Co., Ltd.Inventors: Shikhar TULI, Chi-Heng Lin, Yen-Chang Hsu, Yilin Shen, Hongxia Jin
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Publication number: 20250073296Abstract: A Chinese herbal medicine extract, a method for preparing the same, and a use of the same are disclosed. The Chinese herbal medicine extract includes an active ingredient, which contains any one of or any combination of agarwood, Chinese honeylocust fruit, Chinese honeylocust spine, cinnamon leaf, and camphor leaf. Medication based on the Chinese herbal medicine extract is useful in treating coronavirus-related symptoms or diseases.Type: ApplicationFiled: October 13, 2022Publication date: March 6, 2025Applicant: CHI DON BIOTECHNOLOGY CO.,LTD.Inventors: MING-TANG TSENG, SHU-CHING WEN, HSIAO-CHUN TSENG, SHIH-CHANG HSU, KUO-HO WEN, TZU-HAO TSENG, YI-CHEN WANG, JIN-KUEI WONG, TZA-ZEN CHAUNG, SHAU-KU HUANG
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Publication number: 20250076770Abstract: In a method of generating extreme ultraviolet (EUV) radiation in a semiconductor manufacturing system one or more streams of a gas is directed, through one or more gas outlets mounted over a rim of a collector mirror of an EUV radiation source, to generate a flow of the gas over a surface of the collector mirror. The one or more flow rates of the one or more streams of the gas are adjusted to reduce an amount of metal debris deposited on the surface of the collector mirror.Type: ApplicationFiled: November 14, 2024Publication date: March 6, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Che-Chang HSU, Sheng-Kang YU, Shang-Chieh CHIEN, Li-Jui CHEN, Heng-Hsin LIU
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Patent number: 12245519Abstract: A semiconductor memory device includes a substrate having a conductor region thereon, an interlayer dielectric layer on the substrate, and a conductive via electrically connected to the conductor region. The conductive via has a lower portion embedded in the interlayer dielectric layer and an upper portion protruding from a top surface of the interlayer dielectric layer. The upper portion has a rounded top surface. A storage structure conformally covers the rounded top surface.Type: GrantFiled: December 18, 2023Date of Patent: March 4, 2025Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chia-Chang Hsu, Tang-Chun Weng, Cheng-Yi Lin, Yung-Shen Chen, Chia-Hung Lin
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Patent number: 12236180Abstract: A system for manufacturing an integrated circuit includes a non-transitory computer readable medium configured to store executable instructions, and a processor coupled to the non-transitory computer readable medium. The processor is configured to execute the executable instructions for placing a set of gate layout patterns on a first layout level, and generating a cut feature layout pattern extending in the first direction. The set of gate layout patterns correspond to fabricating a set of gate structures of the integrated circuit. The cut feature layout pattern is on the first layout level, and overlap each of the layout patterns of the set of gate layout patterns at a same position in the second direction. The cut feature layout pattern identifies a location of a removed portion of a gate structure of the set of gate structures.Type: GrantFiled: August 9, 2023Date of Patent: February 25, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Jung Chang, Chin-Chang Hsu, Hsien-Hsin Sean Lee, Wen-Ju Yang