Patents by Inventor Changhua Liu

Changhua Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240132928
    Abstract: The present invention provides a Ganoderma lucidum ?-glucan extract, a preparation method and detection method therefor. The preparation method includes: S1: crushing fruiting bodies of Ganoderma lucidum, mixing the crushed fruiting bodies with a solvent, adding trypsin for enzymatic hydrolysis for 0.5-2 h, and separating to obtain a Ganoderma lucidum fruiting body filter residue; S2: mixing the Ganoderma lucidum fruiting body filter residue with an alkali solution, carrying out ultrasonic extraction with heating, adjusting the pH value of the obtained filtrate to be neutral, and concentrating to obtain a crude Ganoderma lucidum polysaccharide; S3: carrying out alcohol precipitation on the crude Ganoderma lucidum polysaccharide, separating the obtained precipitate, and freeze-drying to obtain a crude Ganoderma lucidum ?-glucan extract; and S4: purifying the crude Ganoderma lucidum ?-glucan extract by glucose gel column chromatography to obtain a Ganoderma lucidum ?-glucan extract.
    Type: Application
    Filed: October 17, 2023
    Publication date: April 25, 2024
    Inventors: Chengyuan LIANG, Boxin ZHANG, Changhua KE, Shan YANG, Jingjing ZHOU, Jinrong HU, Yuting LIU
  • Publication number: 20240133851
    Abstract: A fingerprint spectrum construction method for Xihuang capsules and a fingerprint spectrum includes: S1: taking contents of a Xihuang capsule, adding a methanol-chloroform-phosphoric acid solution, and carrying out ultrasonic extraction to obtain a Xihuang capsule test solution; S2: dissolving cholic acid, hyodeoxycholic acid, deoxycholic acid, bilirubin, muscone, and myrrhone in ethanol to obtain a mixed standard solution 1; dissolving quassin, 11-carbonyl-?-boswellic acid, 11-carbonyl-?-acetyl-boswellic acid, acetyl-11?-methoxy-?-boswellic acid, and sandaracopimaric acid in methanol to obtain a mixed standard solution 2; S3: respectively carrying out chromatography on the Xihuang capsule test solution and the mixed standard solutions 1 and 2, and recording corresponding chromatograms; and S4: constructing a fingerprint spectrum of the Xihuang capsule according to the chromatogram of the Xihuang capsule test solution and the chromatograms of the mixed standard solutions 1 and 2.
    Type: Application
    Filed: January 14, 2024
    Publication date: April 25, 2024
    Inventors: Chengyuan LIANG, Changhua KE, Yanzi WANG, Yuting LIU, Xiuding YANG, Ying ZHOU, Jiaxuan LI
  • Publication number: 20240112972
    Abstract: Disclosed herein are microelectronics package architectures utilizing photo-integrated glass interposers and photonic integrated glass layers and methods of manufacturing the same. The microelectronics packages may include an organic substrate, a photonic integrated glass layer, and a glass interpose. The organic substrate may define through substrate vias. The photonic integrated glass layer may be attached to the organic substrate. The photonic integrated glass layer may include photo detectors. The glass interposer may be attached to the organic substrate. The glass interposer may define through glass vias in optical communication with the photo detectors.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Inventors: Hiroki Tanaka, Robert Alan May, Kristof Darmawikarta, Bai Nie, Brandon C. Marin, Jeremy D. Ecton, Srinivas Venkata Ramanuja Pietambaram, Changhua Liu
  • Publication number: 20240113158
    Abstract: Disclosed herein are microelectronics package architectures utilizing in-situ high surface area capacitor in substrate packages and methods of manufacturing the same. The substrates may include an anode material, a cathode material, and a conductive material. The anode material may have an anode surface that may define a plurality of anode peaks and anode valleys. The cathode material may have a cathode surface that may define a plurality of cathode peaks and cathode valleys complementary to the plurality of anode peaks and anode valleys. The conductive material may be located at the anode peaks.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Inventors: Jeremy D. Ecton, Brandon C. Marin, Haobo Chen, Changhua Liu, Srinivas Venkata Ramanuja Pietambaram
  • Publication number: 20240111090
    Abstract: A device comprises a substrate and an IC die, which may be a photonic IC. The substrate comprises a first surface, a second surface opposite the first surface, an optical waveguide integral with the substrate, and a hole extending from the first surface to the second surface. The hole comprises a first sidewall. The optical waveguide is between the first surface and the second surface, parallel to the first surface, and comprises a first end which extends to the first sidewall. The IC die is within the hole and comprises a second sidewall and an optical port at the second sidewall. The second sidewall is proximate to the first sidewall and the first end of the optical waveguide is proximate to and aligned with the optical port. The substrate may include a recess to receive another device comprising a socket.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Applicant: Intel Corporation
    Inventors: Robert A. May, Tarek Ibrahim, Shriya Seshadri, Kristof Darmawikarta, Hiroki Tanaka, Changhua Liu, Bai Nie, Lilia May, Srinivas Pietambaram, Zhichao Zhang, Duye Ye, Yosuke Kanaoka, Robin McRee
  • Publication number: 20240094746
    Abstract: A multi-machine cooperation method, a scheduling device, and a multi-machine cooperation system are described. The multi-machine cooperation method includes: determining, by a first autonomous robot when detecting an abnormal condition during operation, whether the abnormal condition can be independently processed; and when the abnormal condition cannot be independently processed, sending, by the first autonomous robot, an assistance request to another device in an Internet of Things in which the first autonomous robot is located. In the specification, a multi-machine cooperation operation between autonomous robots or between an autonomous robot and another device can be implemented.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Inventors: Mingming He, Shuanglong Wu, Don Zhendong Gao, Xiahong Zha, Changhua Liu
  • Patent number: 11919907
    Abstract: Disclosed is a JAK1 and/or JAK2 inhibitor of the following structural formula: or a pharmaceutically acceptable salt thereof. This invention also provides pharmaceutical compositions comprising a compound of Formula (I), optionally including additional therapeutic agents, and use in methods of treatment for hair loss disorders.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: March 5, 2024
    Assignee: Sun Pharmaceutical Industries, Inc.
    Inventors: I. Robert Silverman, Changhua Liu
  • Patent number: 11837534
    Abstract: Apparatuses, systems and methods associated with package substrate design with variable height conductive elements within a single layer are disclosed herein. In embodiments, a substrate may include a first layer, wherein a trench is located in the first layer, and a second layer located on a surface of the first layer. The substrate may further include a first conductive element located in a first portion of the second layer adjacent to the trench, wherein the first conductive element extends to fill the trench, and a second conductive element located in a second portion of the second layer, wherein the second conductive element is located on the surface of the first layer. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: December 5, 2023
    Assignee: Intel Corporation
    Inventors: Aleksandar Aleksov, Kristof Darmawikarta, Haobo Chen, Changhua Liu, Sri Ranga Sai Boyapati, Bai Nie
  • Publication number: 20230236517
    Abstract: Embodiments disclosed herein include lithographic patterning systems for non-orthogonal patterning and devices formed with such patterning. In an embodiment, a lithographic patterning system comprises an actinic radiation source, where the actinic radiation source is configured to propagate light along an optical axis. In an embodiment, the lithographic patterning system further comprises a mask mount, where the mask mount is configurable to orient a surface of a mask at a first angle with respect to the optical axis. In an embodiment, the lithographic patterning system further comprises a lens module, and a substrate mount, where the substrate mount is configurable to orient a surface of a substrate at a second angle with respect to the optical axis.
    Type: Application
    Filed: April 3, 2023
    Publication date: July 27, 2023
    Inventors: Changhua LIU, Jianyong MO, Liang ZHANG
  • Patent number: 11644757
    Abstract: Embodiments disclosed herein include lithographic patterning systems for non-orthogonal patterning and devices formed with such patterning. In an embodiment, a lithographic patterning system comprises an actinic radiation source, where the actinic radiation source is configured to propagate light along an optical axis. In an embodiment, the lithographic patterning system further comprises a mask mount, where the mask mount is configurable to orient a surface of a mask at a first angle with respect to the optical axis. In an embodiment, the lithographic patterning system further comprises a lens module, and a substrate mount, where the substrate mount is configurable to orient a surface of a substrate at a second angle with respect to the optical axis.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: May 9, 2023
    Assignee: Intel Corporation
    Inventors: Changhua Liu, Jianyong Mo, Liang Zhang
  • Publication number: 20230104330
    Abstract: Position controlled waveguides and methods of manufacturing the same are disclosed. An example apparatus includes a substrate with a channel that extends into a first surface of the substrate to a second surface of the substrate, wherein the second surface is recessed relative to the first surface; buffer material having a first index of refraction on the second surface of the substrate; and a waveguide on the buffer material, the waveguide having a second index of refraction that is higher than the first index of refraction.
    Type: Application
    Filed: September 23, 2021
    Publication date: April 6, 2023
    Inventors: Jeremy Ecton, Leonel Arana, Whitney Bryks, Haobo Chen, Benjamin Duong, Changhua Liu, Brandon Marin, Srinivas Pietambaram
  • Publication number: 20230095281
    Abstract: Methods and apparatus to reduce defects in interconnects between semiconductor dies and package substrates are disclosed. An apparatus includes a substrate and a semiconductor die mounted to the substrate. The apparatus further includes bumps to electrically couple the die to the substrate. Ones of the bumps have corresponding bases. The bases have a shape that is non-circular.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Inventors: Kyle McElhinny, Hongxia Feng, Xiaoying Guo, Steve Cho, Jung Kyu Han, Changhua Liu, Leonel Arana, Rahul Manepalli, Dingying Xu, Amram Eitan
  • Publication number: 20230090133
    Abstract: An electronic device and associated methods are disclosed. In one example, the electronic device includes a photonic integrated circuit and an in situ formed waveguide. In selected examples, the electronic device includes a photonic integrated circuit coupled to an electronic integrated circuit, in a glass layer, where a waveguide is formed in the glass layer.
    Type: Application
    Filed: September 21, 2021
    Publication date: March 23, 2023
    Inventors: Bai Nie, Pooya Tadayon, Leonel R. Arana, Yonggang Li, Changhua Liu, Kristof Darmawikarta, Srinivas Venkata Ramanuja Pietambaram, Tarek A. Ibrahim, Hari Mahalingam, Benjamin Duong
  • Publication number: 20230091050
    Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques directed to optical interconnects and optical waveguides within a glass layer of a semiconductor package, where dies that are physically and optically coupled with the glass layer are optically coupled with each other via the optical waveguides. One or more reflectors may be used to direct the optical pathway through the glass layer. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: September 20, 2021
    Publication date: March 23, 2023
    Inventors: Zhichao ZHANG, Pooya TADAYON, Tarek A. IBRAHIM, Srinivas V. PIETAMBARAM, Changhua LIU, Kemal AYGÜN
  • Publication number: 20230087124
    Abstract: Various embodiments disclosed relate to photonic assemblies. The present disclosure includes methods for packaging a photonic assembly, including attaching a bridge die to a glass substrate, attaching an electronic integrated circuit die to the glass substrate and the bridge die, attaching a photonic integrated circuit die to the glass substrate and the bridge die, bonding a coupling adapter to the glass substrate and in situ forming a waveguide in the coupling adapted, the waveguide aligning with the photonic integrated circuit die.
    Type: Application
    Filed: September 23, 2021
    Publication date: March 23, 2023
    Inventors: Bai Nie, Pooya Tadayon, Leonel R. Arana, Yonggang Li, Changhua Liu, Kristof Darmawikarta, Srinivas Venkata Ramanuja Pietambaram, Tarek A. Ibrahim, Hari Mahalingam, Benjamin Duong
  • Publication number: 20230077633
    Abstract: An electronic device comprises a photonic integrated circuit (PIC) including at least one waveguide, an emitting lens disposed on the PIC to emit light from the at least one waveguide in a direction substantially parallel to a first surface of the PIC, and an optical element disposed on the PIC and having a reflective surface configured to direct light emitted from the emitting lens in a direction away from the first surface of the PIC.
    Type: Application
    Filed: September 15, 2021
    Publication date: March 16, 2023
    Inventors: Changhua Liu, Pooya Tadayon, John Heck, Eric J. Moret, Tarek A. Ibrahim, Zhichao Zhang, Jeremy D Ecton
  • Publication number: 20230077939
    Abstract: An electronic device comprises a photonic integrated circuit (PIC) including at least one optical signal source, an emitting lens disposed on the PIC to steer light emitted by the at least one optical signal source in a direction substantially parallel to a first surface of the PIC, and an optical element disposed on the PIC and having a curved surface in a shape of a quarter cylinder that is configured to steer light emitted from the emitting lens in a direction substantially orthogonal to the first surface of the PIC.
    Type: Application
    Filed: September 15, 2021
    Publication date: March 16, 2023
    Inventors: Changhua Liu, Pooya Tadayon, John Heck, Srikant Nekkanty
  • Patent number: 11586112
    Abstract: Embodiments disclosed herein include a lithographic patterning system and methods of using such a system to form a microelectronic device. In an embodiment, the lithographic patterning system includes an actinic radiation source, a stage where a major surface of the stage is for supporting a substrate with a resist layer, and a first prism over the stage, where the first prism comprises a first face that is substantially parallel to the major surface of the stage. In an embodiment, the lithographic patterning system further comprises a second prism, where the second prism comprises a first surface that is substantially parallel to a second surface of the first prism, and where a second surface of the second prism has a reflective coating.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: February 21, 2023
    Assignee: Intel Corporation
    Inventors: Changhua Liu, Allan Ketelsen
  • Publication number: 20230027030
    Abstract: A patch structure of an integrated circuit package comprises a core having a first side facing downwards and a second side facing upwards. A first solder resist (SR) layer is formed on the first side of the core, wherein the first SR layer comprises a first layer interconnect (FLI) and has a first set of one or more microbumps thereon to bond to one or more logic die. A second solder resist (SR) layer is formed on the second side of the core, wherein the second SR layer has a second set of one or more microbumps thereon to bond with a substrate. One or more bridge dies includes a respective sets of bumps, wherein the one or more bridge dies is disposed flipped over within the core such that the respective sets of bumps face downward and connect to the first set of one or more microbumps in the FLI.
    Type: Application
    Filed: September 30, 2022
    Publication date: January 26, 2023
    Inventors: Changhua LIU, Xiaoying GUO, Aleksandar ALEKSOV, Steve S. CHO, Leonel ARANA, Robert MAY, Gang DUAN
  • Publication number: 20220413210
    Abstract: Techniques and mechanisms for optically coupling a photonic integrated circuit (PIC) chip to an optical fiber via a planar optical waveguide structure. In an embodiment, a PIC chip comprises integrated circuitry, photonic waveguides, and integrated edge-oriented couplers (IECs) which are coupled to the integrated circuitry via the photonic waveguides. The PIC chip forms respective divergent lens surfaces of the IECs, which are each at a respective terminus of a corresponding one of the photonic waveguides. A planar optical waveguide structure, which is adjacent to the IECs, comprises a core which is optically coupled between the PIC chip and an array of optical fibers. In another embodiment, an edge of the PIC forms a stepped structure, wherein an upper portion of the stepped structure comprises the plurality of coplanar IECs, and a lower portion of the stepped structure extends past the plurality of coplanar IECs.
    Type: Application
    Filed: June 25, 2021
    Publication date: December 29, 2022
    Applicant: Intel Corporation
    Inventors: Changhua Liu, Pooya Tadayon, Zhichao Zhang, Liang Zhang