Abstract: A display apparatus comprises a plurality of pixel areas, each defined by gate lines and data lines, wherein the data lines are arranged with the gate lines forming an angular relationship with the data lines, and a plurality of pixel electrodes formed in the pixel areas and configured to be essentially parallel with the arrangement of the gate lines.

Abstract: The present invention is directed to an apparatus of driving a liquid crystal display device including a plurality of pixels. The driving apparatus includes a gray voltage generator for generating a plurality of gray voltages, an image signal driver for selecting gray voltages corresponding to color signals and applying the selected gray voltages as image signal voltages to the pixels, and a signal controller for controlling the image signal driver based on the color signals and input control signals for controlling the color signals. At least two successive first gray voltages among the plurality of gray voltages are variable and at least two successive second gray voltages among the plurality of gray voltages are fixed.

Abstract: A thin film transistor panel is provided. The thin film transistor panel includes: a substrate; gate lines formed on the substrate; data lines insulated from the gate lines and intersecting the gate lines; thin film transistors which are connected to the gate lines and the data lines and have drain electrodes; capacitive coupling electrodes connected to the drain electrodes; and pixel electrodes which are formed in the pixels surrounded by the gate lines and the data lines and include first pixel electrodes connected to the drain electrodes and second pixel electrodes which are separated from the first pixel electrodes and overlap with the capacitive coupling electrodes, wherein the first and second pixel electrodes of different pixel electrodes have a left-right symmetrical structure.

Abstract: A liquid crystal display is provided, which includes: groups of gate lines transmitting a gate-on voltage; data lines alternately transmitting normal data voltages and an impulsive data voltage; pixels arranged in a matrix and including switching elements that are connected to the gate lines and the data lines and turn on in response to the gate-on voltage to transmit the data voltages; gate driving circuits connected to respective groups of gate lines and sequentially applying the gate-on voltage to the gate lines; a data driver applying the data voltages to the data lines; a duty ratio selector outputting a duty ratio selection signal informing a selected duty ratio; and a signal controller controlling the gate driver and the data driver based on the duty ratio selection signal, wherein the signal controller determines a time for the application of the impulsive data voltage based on the duty ratio selection signal.

Abstract: The invention provides a LCD including an insulating substrate; a plurality of first signal lines formed on the insulating substrate; a plurality of second signal lines crossing and insulated from the first signal lines; a plurality of thin film transistors (TFT) coupled with the first and second signal lines; and a plurality of pixels including a plurality of first sub-pixel electrodes coupled with the TFTs and a plurality of second sub-pixel electrodes capacitively coupled with the first sub-pixel electrodes, wherein the pixels include a red (R) pixel, a green (G) pixel, and a blue (B) pixel and a voltage ratio or an area ratio of the second sub-pixel electrode with respect to the first sub-pixel electrode is different among the R, G, and B pixels to improve a brightness ratio of R, G, and B components at a lateral position.

Abstract: The invention provides a liquid crystal display including a thin film transistor array panel according to an embodiment of the present invention includes: a substrate; a gate line formed on the substrate; a data line crossing the gate line; a thin film transistor connected to the gate and data lines; and a pixel electrode including first and second subpixel portions electrically connected to the thin film transistor, and a third subpixel portion capacitively coupled to at least one of the first and the second subpixel portions. Such an arrangement of a TFT permits a distribution of the tilt directions of liquid crystal molecules in the same pixel to improve lateral viewing of the liquid crystal display.

Abstract: A liquid crystal display according to an embodiment of the present invention includes: a gate line; a data line intersecting the gate line; a thin film transistor coupled to the gate line and the data line; and a pixel including a first subpixel coupled to the thin film transistor and a second subpixel capacitively coupled to the first subpixel, wherein the first subpixel and the second subpixel have different cell gaps.

Abstract: An EEPROM device includes a device isolation layer disposed at a predetermined region of a semiconductor substrate to define active regions, a pair of control gates crossing the device isolation layers and an active region, a pair of selection gates interposed between the control gates to cross the device isolation layers and the active region and a floating gate and an intergate dielectric pattern stacked sequentially between the control gates and the active region The EEPROM device further includes a gate insulation layer of a memory transistor interposed between the floating gate and the active region and a tunnel insulation layer thinner than the gate insulation layer of the memory transistor and a gate insulation layer of a selection transistor interposed between the selection gates and the active region. The tunnel insulation layer is aligned at one side adjacent to the floating gate.

Abstract: A thin film transistor panel is provided. The thin film transistor panel includes: a substrate; gate lines formed on the substrate; data lines insulated from the gate lines and intersecting the gate lines; thin film transistors which are connected to the gate lines and the data lines and have drain electrodes; capacitive coupling electrodes connected to the drain electrodes; and pixel electrodes which are formed in the pixels surrounded by the gate lines and the data lines and include first pixel electrodes connected to the drain electrodes and second pixel electrodes which are separated from the first pixel electrodes and overlap with the capacitive coupling electrodes, wherein the first and second pixel electrodes of different pixel electrodes have a left-right symmetrical structure.

Abstract: Disclosed is a liquid crystal display comprising a first substrate including wiring, which intersects to define unit pixels, and a first electrode formed in each unit pixel; a second substrate provided opposing the first substrate at a predetermined distance and including a second electrode formed over an entire surface of the second substrate, the second electrode generating an electric field with the first electrode; and a liquid crystal layer injected between the first substrate and the second substrate and including liquid crystal molecules that are horizontally oriented in one direction, the liquid crystal molecules, as a result of the electric field generated between the first and second substrates, having a symmetrically bent alignment about an imaginary center plane parallel to the first and second substrates at a center position therebetween, wherein the first electrode is protruded in a direction toward the second substrate at edges where orientation for the liquid crystal molecules starts.

Abstract: An EEPROM device includes a device isolation layer disposed at a predetermined region of a semiconductor substrate to define active regions, a pair of control gates crossing the device isolation layers and an active region, a pair of selection gates interposed between the control gates to cross the device isolation layers and the active region and a floating gate and an intergate dielectric pattern stacked sequentially between the control gates and the active region The EEPROM device further includes a gate insulation layer of a memory transistor interposed between the floating gate and the active region and a tunnel insulation layer thinner than the gate insulation layer of the memory transistor and a gate insulation layer of a selection transistor interposed between the selection gates and the active region. The tunnel insulation layer is aligned at one side adjacent to the floating gate.

Abstract: Disclosed is a liquid crystal display comprising a first substrate including wiring, which intersects to define unit pixels, and a first electrode formed in each unit pixel; a second substrate provided opposing the first substrate at a predetermined distance and including a second electrode formed over an entire surface of the second substrate, the second electrode generating an electric field with the first electrode; and a liquid crystal layer injected between the first substrate and the second substrate and including liquid crystal molecules that are horizontally oriented in one direction, the liquid crystal molecules, as a result of the electric field generated between the first and second substrates, having a symmetrically bent alignment about an imaginary center plane parallel to the first and second substrates at a center position therebetween, wherein the first electrode is protruded in a direction toward the second substrate at edges where orientation for the liquid crystal molecules starts.

Abstract: A TFT array panel on which both pixel electrodes and common electrodes are formed and a color filter panel is disposed opposing the array panel, and liquid crystals are interposed therebetween. The liquid crystals are aligned parallel to the two panels and driven by parallel electric field formed between the pixel electrodes and reference electrodes. Polarization films are arranged outsides the two panels, and a quasi-A plate compensation film is arranged between the color filter panel and the polarization film.

Abstract: A nonvolatile memory device includes a semiconductor well region of first conductivity type on a semiconductor substrate and a common source diffusion region of second conductivity type extending in the semiconductor well region and forming a P-N rectifying junction therewith. A byte-erasable EEPROM memory array is provided in the semiconductor well region. This byte-erasable EEPROM memory array is configured to support independent erasure of first and second pluralities of EEPROM memory cells therein that are electrically connected to the common source diffusion region.

Abstract: In a display apparatus and a method of driving the same, an active period during which one pixel is turned on is divided into a red sub frame, a green sub frame, a blue sub frame, and a white sub frame. A controller compares a gray scale of a fourth image data corresponding to the white sub frame with a reference gray scale and compensates a first image data, a second image data, and a third image data corresponding to the red, green, and blue sub frames, respectively, in accordance with the comparison result.

Abstract: Disclosed is a liquid crystal display capable of high quality image and bright display. Gate signal lines are curved at near switching elements of the liquid crystal display. A pixel area is defined by the gate signal lines and their intersecting data signal lines. Pixel electrodes and common electrodes are disposed along a longitudinal direction of a pixel. A pixel signal and a common signal line is connected to the pixel electrode and the common electrode respectively. A storage capacitor may be formed in the middle of a longitudinal direction of the pixel, or where generally a texture may arise during display. One half of the pixel may be symmetrical with the other half with respect to the storage capacitor. A common signal line may be parallel with the data signal line and be disposed nearer to the data signal line than a pixel signal line. The pixel may be disposed symmetrically with respect to the data signal line therebetween.

Abstract: A liquid crystal display device includes a pixel electrode connected to a gate line and a data line on a first substrate, and a common electrode formed on a second substrate. The pixel electrode includes a stem electrode parallel with the data line, first branch electrodes connected to the stem electrode and inclined at a first angle, second branch electrodes connected to the stem electrode and inclined at a second angle, and a first storage electrode between the first branch electrodes and the second branch electrodes. The first storage electrode is wider than the first branch electrodes and the second branch electrodes. The common electrode includes branch electrodes located between the first branch electrodes, and branch electrodes located between the second branch electrodes. The common electrode also includes a second storage electrode corresponding to the first storage electrode to function as a storage capacitor.

Abstract: A thin film transistor array panel may comprise gate lines including gate electrodes and storage electrode lines including storage electrodes that are formed on the insulating substrate, a semiconductor layer formed on the gate insulating layer covering the gate lines, data lines and drain electrodes which are formed on the gate insulating layer, the drain lines including source electrodes formed at least on the semiconductor layer and intersecting the gate lines, and the drain electrodes being separated from the data lines and opposite to the data lines with respect to the gate electrodes and including a storage capacitor conductor overlapping the storage electrodes. Pixel electrodes and common electrodes may be formed on the passivation layer for covering the semiconductor layer. The pixel electrodes and the common electrodes may be neither perpendicular to nor parallel to the data lines and may be made of opaque conductive material.

Abstract: A display apparatus, includes: a first substrate; a gate line formed over the first substrate; a data line traversing the gate line, and comprising a source electrode; a drain electrode facing the source electrode to define a channel area; a passivation layer formed over the data line and the drain electrode, and comprising an organic material; a pixel electrode formed over the passivation layer, and comprising a first stem electrode, at least a part of which is overlapped with the gate line or the data line, and a plurality of first branch electrodes contacted to the first stem electrode where one set of the first branch electrodes extend longitudinally in a direction different from the longitudinal extension direction of another set of the first branch electrodes so as to thereby cause opposed twisting of corresponding liquid crystal material.

Abstract: Disclosed is a liquid crystal display capable of high quality image and bright display. Gate signal lines are curved at near switching elements of the liquid crystal display. A pixel area is defined by the gate signal lines and their intersecting data signal lines. Pixel electrodes and common electrodes are disposed along a longitudinal direction of a pixel. A pixel signal and a common signal line is connected to the pixel electrode and the common electrode respectively. A storage capacitor may be formed in the middle of a longitudinal direction of the pixel, or where generally a texture may arise during display. One half of the pixel may be symmetrical with the other half with respect to the storage capacitor. A common signal line may be parallel with the data signal line and be disposed nearer to the data signal line than a pixel signal line. The pixel may be disposed symmetrically with respect to the data signal line therebetween.