Patents by Inventor Chang-Hung Chiang

Chang-Hung Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145327
    Abstract: A semiconductor device includes a substrate, an interconnect structure, and conductive vias. The substrate has a first side, a second side and a sidewall connecting the first side and the second side, wherein the sidewall includes a first planar sidewall of a first portion of the substrate, a second planar sidewall of a second portion of the substrate and a curved sidewall of a third portion of the substrate, where the first planar sidewall is connected to the second planar sidewall through the curved sidewall. The interconnect structure is located on the first side of the substrate, where a sidewall of the interconnect structure is offset from the second planar sidewall. The conductive vias are located on the interconnect structure, where the interconnect structure is located between the conductive vias and the substrate.
    Type: Application
    Filed: December 27, 2023
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chang-Jung Hsueh, Cheng-Nan Lin, Wan-Yu Chiang, Wei-Hung Lin, Ching-Wen Hsiao, Ming-Da Cheng
  • Publication number: 20240128219
    Abstract: A semiconductor die including mechanical-stress-resistant bump structures is provided. The semiconductor die includes dielectric material layers embedding metal interconnect structures, a connection pad-and-via structure, and a bump structure including a bump via portion and a bonding bump portion. The entirety of a bottom surface of the bump via portion is located within an area of a horizontal top surface of a pad portion of the connection pad-and-via structure.
    Type: Application
    Filed: December 6, 2023
    Publication date: April 18, 2024
    Inventors: Hui-Min Huang, Wei-Hung Lin, Kai Jun Zhan, Chang-Jung Hsueh, Wan-Yu Chiang, Ming-Da Cheng
  • Publication number: 20240088119
    Abstract: Provided are a package structure and a method of forming the same. The method includes providing a first package having a plurality of first dies and a plurality of second dies therein; performing a first sawing process to cut the first package into a plurality of second packages, wherein one of the plurality of second packages comprises three first dies and one second die; and performing a second sawing process to remove the second die of the one of the plurality of second packages, so that a cut second package is formed into a polygonal structure with the number of nodes greater than or equal to 5.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Hung Lin, Hui-Min Huang, Chang-Jung Hsueh, Wan-Yu Chiang, Ming-Da Cheng, Mirng-Ji Lii
  • Patent number: 7642040
    Abstract: Providing a fabrication method of a periodic domain inversion structure. A nonlinear optical ferroelectric material substrate is provided. A photoresist layer is formed on the upper and the lower surface of the substrate, and periodic gratings formed by interference of two laser beams are employed to expose the photoresist layer on the upper surface. Meanwhile, the two laser beams pass through the substrate, so the periodic gratings are used to expose the photoresist layer on the lower surface. A development process is performed to form a periodic photoresist pattern on the two surfaces of the substrate. A conductive layer is formed above the substrate for covering the photoresist pattern and the surface of the exposed substrate. The photoresist pattern and a portion of the conductive layer thereon are removed by lift-off. A voltage is applied to the substrate via the remaining conductive layer to polarize parts of the substrate.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: January 5, 2010
    Assignee: National Central University
    Inventors: Jyh-Chen Chen, Chang-Hung Chiang, Yeeu-Chang Lee, Cheng-Wei Chien
  • Publication number: 20070298334
    Abstract: Providing a fabrication method of a periodic domain inversion structure. A nonlinear optical ferroelectric material substrate is provided. A photoresist layer is formed on the upper and the lower surface of the substrate, and periodic gratings formed by interference of two laser beams are employed to expose the photoresist layer on the upper surface. Meanwhile, the two laser beams pass through the substrate, so the periodic gratings are used to expose the photoresist layer on the lower surface. A development process is performed to form a periodic photoresist pattern on the two surfaces of the substrate. A conductive layer is formed above the substrate for covering the photoresist pattern and the surface of the exposed substrate. The photoresist pattern and a portion of the conductive layer thereon are removed by lift-off. A voltage is applied to the substrate via the remaining conductive layer to polarize parts of the substrate.
    Type: Application
    Filed: March 5, 2007
    Publication date: December 27, 2007
    Applicant: NATIONAL CENTRAL UNIVERSITY
    Inventors: Jyh-Chen Chen, Chang-Hung Chiang, Yeeu-Chang Lee, Cheng-Wei Chien
  • Patent number: D671238
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: November 20, 2012
    Assignee: Delta Electronics, Inc.
    Inventors: Cheng Hsiu Du, Chun Min Huang, Chang Hung Chiang
  • Patent number: D671239
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: November 20, 2012
    Assignee: Delta Electronics, Inc.
    Inventors: Cheng Hsiu Du, Chun Min Huang, Chang Hung Chiang