Abstract: A semiconductor device is provided. The semiconductor device comprises a substrate including a first region, a second region, and a connecting region placed between the first region and the second region, a plurality of first multi-channel active patterns placed in the first region of the substrate, a plurality of second multi-channel active patterns placed in the second region of the substrate, a first connecting fin type pattern which is placed in the connecting region of the substrate and extends from the first region to the second region in a first direction, and a field insulating film which is placed on the substrate and covers an upper surface of the first connecting fin type pattern, wherein a width of the first connecting fin type pattern in a second direction decreases and then increases as it goes away from the first region, and the first direction is perpendicular to the second direction.

Abstract: A semiconductor device is provided. The semiconductor device comprises a substrate including a first region, a second region, and a connecting region placed between the first region and the second region, a plurality of first multi-channel active patterns placed in the first region of the substrate, a plurality of second multi-channel active patterns placed in the second region of the substrate, a first connecting fin type pattern which is placed in the connecting region of the substrate and extends from the first region to the second region in a first direction, and a field insulating film which is placed on the substrate and covers an upper surface of the first connecting fin type pattern, wherein a width of the first connecting fin type pattern in a second direction decreases and then increases as it goes away from the first region, and the first direction is perpendicular to the second direction.

Abstract: A semiconductor device is provided. The semiconductor device comprises a substrate including a first region, a second region, and a connecting region placed between the first region and the second region, a plurality of first multi-channel active patterns placed in the first region of the substrate, a plurality of second multi-channel active patterns placed in the second region of the substrate, a first connecting fin type pattern which is placed in the connecting region of the substrate and extends from the first region to the second region in a first direction, and a field insulating film which is placed on the substrate and covers an upper surface of the first connecting fin type pattern, wherein a width of the first connecting fin type pattern in a second direction decreases and then increases as it goes away from the first region, and the first direction is perpendicular to the second direction.

Abstract: The present disclosure relates to a technology for designing a transmitarray antenna based on the mode and incidence angle of feed radio waves. The transmitarray antenna according to one embodiment of the present disclosure includes a plurality of transmitting surface unit cells having different surface structures and different longitudinal lengths located in a plurality of regions, wherein the transmitting surface unit cells are arranged in a mixed manner in the regions based on the different longitudinal lengths and the phase of a transmission coefficient determined based on an input phase and an output phase based on the mode and incidence angle of radio waves transmitted from a feed antenna.

Abstract: The present disclosure relates to a technology for designing a transmitarray antenna based on the mode and incidence angle of feed radio waves. The transmitarray antenna according to one embodiment of the present disclosure includes a plurality of transmitting surface unit cells having different surface structures and different longitudinal lengths located in a plurality of regions, wherein the transmitting surface unit cells are arranged in a mixed manner in the regions based on the different longitudinal lengths and the phase of a transmission coefficient determined based on an input phase and an output phase based on the mode and incidence angle of radio waves transmitted from a feed antenna.

Abstract: A method, apparatus, and system are configured to recommend content using metadata including an event metadata unit, a searching unit, and a control unit. The event metadata generating unit is configured to generate event metadata regarding content selected by a user. The searching unit which, on the basis of the generated event metadata and social metadata regarding content uploaded to an SNS server associated with the user, is configured to search the content uploaded to the SNS server to recommend content to be provided to the user. The control unit is configured to provide the recommended content to the user using the social metadata regarding the searched recommended content.

Abstract: There is disclosed a transformer, comprising a triangular wound core; a low voltage LV winding; and at least one high voltage HV foil disc winding and a method for manufacturing a transformer coil, comprising providing a high voltage HV inner mold assembly; and winding at least one HV foil disc winding on the HV inner mold assembly. There is also disclosed a mold for manufacturing a transformer coil, comprising side gears respectively arranged at top and bottom positions of a triangular wound core; a high voltage HV inner mold assembly connected to the side gears; and a HV outer mold assembly connected to the side gears, wherein the HV outer mold assembly has a top opening across a length thereof.

Abstract: Resistor bias circuitry is included in components of an XTAL oscillator system to reduce 1/f noise. An XTAL oscillator includes a resistor bias circuit attached to the XTAL core. A common mode feedback OP amp connected to the XTAL core also includes a resistor bias circuit. An XTAL oscillator chain includes an XTAL core, common mode feedback OP amp, common mode logic buffer (CML BF), and differential to CMOS converter (D2C) each with resistor bias circuitry.

Abstract: Compensation circuitry includes a resistor and transistor coupled in series with a reference current source to generate a variable reference voltage that is provided, via a voltage regulator, to bias elements of a core circuit in order to establish an operating current in the core circuit. In one embodiment, the resistor and transistor of the compensation circuitry are of similar construction to the bias elements of the core circuit, such that fluctuations in the ratio of the reference current and the operating current of the core circuit are minimized over process, supply voltage and temperature variations. The voltage regulator may be a low dropout regulator. In various embodiments, the core circuit may comprise a resistor biased voltage controlled oscillator, a differential current mode logic (CML) input to single CMOS output circuit, or like circuitry that may be sensitive to phase noise or requires low power operation.

Abstract: A method, apparatus, and system are configured to recommend content using metadata including an event metadata unit, a searching unit, and a control unit. The event metadata generating unit is configured to generate event metadata regarding content selected by a user. The searching unit which, on the basis of the generated event metadata and social metadata regarding content uploaded to an SNS server associated with the user, is configured to search the content uploaded to the SNS server to recommend content to be provided to the user. The control unit is configured to provide the recommended content to the user using the social metadata regarding the searched recommended content.

Abstract: Resistor bias circuitry is included in components of an XTAL oscillator system to reduce 1/f noise. An XTAL oscillator includes a resistor bias circuit attached to the XTAL core. A common mode feedback OP amp connected to the XTAL core also includes a resistor bias circuit. An XTAL oscillator chain includes an XTAL core, common mode feedback OP amp, common mode logic buffer (CML BF), and differential to CMOS converter (D2C) each with resistor bias circuitry.

Abstract: A method of manufacturing a transformer that includes forming a disc-wound coil using a plurality of pre-formed cooling ducts. Each cooling duct may be supported by a support pipe secured between walls of the cooling duct, or by a removable insert. First and second conductor layers are formed, each of which include plurality of disc windings arranged in an axial direction of the disc-wound coil. A spacer layer is formed between the first and second conductor layers to form a plurality of axially-extending passages. The cooling ducts are slid into the axially-extending passages so as to be disposed between the first and second conductor layers.

Abstract: A multifunctional video apparatus and a method of providing a user interface (UI) thereof. The multifunctional video apparatus has diverse functions such as image capturing, image reproduction, image editing, image input/output from/to an external device, etc., and provides a UI capable of performing the above-described functions more conveniently.

Abstract: A method of manufacturing a transformer that includes forming a disc-wound coil using a plurality of pre-formed cooling ducts. Each cooling duct may be supported by a support pipe secured between walls of the cooling duct, or by a removable insert. First and second conductor layers are formed, each of which include plurality of disc windings arranged in an axial direction of the disc-wound coil. A spacer layer is formed between the first and second conductor layers to form a plurality of axially-extending passages. The cooling ducts are slid into the axially-extending passages so as to be disposed between the first and second conductor layers.

Abstract: An integrated circuit assembly includes a voltage level generator, a level shifter, a bandgap reference generator and a voltage regulator. The voltage level generator generates output voltage level signals in response to a supply voltage. The level shifter receives the output voltage level signals from the voltage level generator and generates first and second sets of control signals. The bandgap reference generator receives a reference voltage input and generates a bandgap reference signal. The voltage regulator receives a supply voltage, the bandgap reference signal the first and second sets of control signals from the level shifter and generates a constant output voltage under varying circuit conditions.

Abstract: An integrated circuit assembly includes a voltage level generator, a level shifter, a bandgap reference generator and a voltage regulator. The voltage level generator generates output voltage level signals in response to a supply voltage. The level shifter receives the output voltage level signals from the voltage level generator and generates first and second sets of control signals. The bandgap reference generator receives a reference voltage input and generates a bandgap reference signal. The voltage regulator receives a supply voltage, the bandgap reference signal the first and second sets of control signals from the level shifter and generates a constant output voltage under varying circuit conditions.

Abstract: An integrated circuit assembly includes a voltage level generator, a level shifter, a bandgap reference generator and a voltage regulator. The voltage level generator generates output voltage level signals in response to a supply voltage. The level shifter receives the output voltage level signals from the voltage level generator and generates first and second sets of control signals. The bandgap reference generator receives a reference voltage input and generates a bandgap reference signal. The voltage regulator receives a supply voltage, the bandgap reference signal the first and second sets of control signals from the level shifter and generates a constant output voltage under varying circuit conditions.

Abstract: An integrated circuit assembly includes a voltage level generator, a level shifter, a bandgap reference generator and a voltage regulator. The voltage level generator generates output voltage level signals in response to a supply voltage. The level shifter receives the output voltage level signals from the voltage level generator and generates first and second sets of control signals. The bandgap reference generator receives a reference voltage input and generates a bandgap reference signal. The voltage regulator receives a supply voltage, the bandgap reference signal the first and second sets of control signals from the level shifter and generates a constant output voltage under varying circuit conditions.

Abstract: A multifunctional video apparatus and a method of providing a user interface (UI) thereof. The multifunctional video apparatus has diverse functions such as image capturing, image reproduction, image editing, image input/output from/to an external device, etc., and provides a UI capable of performing the above-described functions more conveniently.

Abstract: According to one exemplary embodiment, a frequency synthesizer module includes a loop filter, where the loop filter includes a capacitor having a first terminal and a second terminal. The frequency synthesizer module further includes a loop filter calibration module coupled to the capacitor in the loop filter. The loop filter calibration module causes an initial capacitance between the first terminal and the second terminal of the capacitor to increase to a target capacitance when the loop filter is in a calibration mode. The target capacitance can causes in increase in control of a bandwidth of the loop filter and a reduction in percent error of a unity gain bandwidth of the loop filter. The loop filter further includes a switched capacitor array configured to cause the initial capacitance to increase to the target capacitance in response to a digital feedback signal provided by the loop filter calibration module.