Patents by Inventor Chang-Hyo Yu

Chang-Hyo Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11874953
    Abstract: A method for runtime integrity check, performed by a security core including one or more processors includes storing a first output value, which is generated by using a one-way encryption algorithm based on first data and a first encryption key managed by an encryption key manager accessible by the security core, in a main memory that is a volatile memory in association with the first data, generating a second output value for the first data based on the first data and the first encryption key by using the one-way encryption algorithm, and checking for possible tampering of the first data stored in the main memory by comparing the first output value with the generated second output value.
    Type: Grant
    Filed: June 20, 2023
    Date of Patent: January 16, 2024
    Assignee: REBELLIONS INC.
    Inventors: Myunghoon Choi, Chang-Hyo Yu
  • Publication number: 20230244920
    Abstract: A neural processing device is provided. The neural processing device comprises a plurality of neural processors, a shared memory shared by the plurality of neural processors, a plurality of semaphore memories, and global interconnection. The plurality of neural processors generates a plurality of L3 sync targets, respectively. Each semaphore memory is associated with a respective one of the plurality of neural processors, and the plurality of semaphore memories receive and store the plurality of L3 sync targets, respectively. Synchronization of the plurality of neural processors is performed according to the plurality of L3 sync targets. The global interconnection connects the plurality of neural processors with the shared memory, and comprises an L3 sync channel through which an L3 synchronization signal corresponding to at least one L3 sync target is transmitted.
    Type: Application
    Filed: April 11, 2023
    Publication date: August 3, 2023
    Inventors: Jinwook Oh, Jinseok Kim, Kyeongryeol Bong, Wongyu Shin, Chang-Hyo Yu
  • Patent number: 11657261
    Abstract: A neural processing device is provided. The neural processing device comprises a plurality of neural processors, a shared memory shared by the plurality of neural processors, a plurality of semaphore memories, and global interconnection. The plurality of neural processors generates a plurality of L3 sync targets, respectively. Each semaphore memory is associated with a respective one of the plurality of neural processors, and the plurality of semaphore memories receive and store the plurality of L3 sync targets, respectively. Synchronization of the plurality of neural processors is performed according to the plurality of L3 sync targets. The global interconnection connects the plurality of neural processors with the shared memory, and comprises an L3 sync channel through which an L3 synchronization signal corresponding to at least one L3 sync target is transmitted.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: May 23, 2023
    Assignee: Rebellions Inc.
    Inventors: Jinwook Oh, Jinseok Kim, Kyeongryeol Bong, Wongyu Shin, Chang-Hyo Yu
  • Patent number: 10140677
    Abstract: A graphics processing unit (GPU) for determining whether to perform tessellation on a first model according to a control of a central processing unit (CPU) is provided. The GPU reads the first model from a memory, which stores prepared models having different complexities; calculates a complexity of the first model; compares the calculated complexity with a reference complexity; and determines whether to perform a tessellation operation on the first model according to a comparison result.
    Type: Grant
    Filed: August 11, 2015
    Date of Patent: November 27, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seok Hoon Kim, Chang Hyo Yu
  • Patent number: 10019802
    Abstract: A graphics processing unit (GPU) that performs rendering in units of tiles includes a coefficient generator that produces an interpolation coefficient based on coordinates of vertices of a primitive included in a first tile and a second tile; an interpolator that produces barycentric coordinates in respective pixels for the first tile of the primitive and pixel values in the first tile corresponding to the primitive, based on the interpolation coefficient, and a storage configured to store the interpolation coefficient. The GPU produces barycentric coordinates in and pixel values of respective pixels for a second tile of the primitive, based on the interpolation coefficient stored in the storage.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: July 10, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hong Yun Kim, Chang Hyo Yu
  • Patent number: 9830740
    Abstract: A graphic processing unit includes a geometry processing unit and a rendering processing unit. The geometry processing unit is configured to receive vertexes and to generate at least one primitive using the vertexes. The rendering processing unit is configured to convert the generated at least one primitive into fragments, to perform fragment shading on the converted fragments, and to perform anti-aliasing on the fragments on which the fragment shading has been performed. The rendering processing unit performs the anti-aliasing on first color data and second color data that is different from the first color data using different operations from each other.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: November 28, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-Kwon Cho, Chang-Hyo Yu
  • Patent number: 9779547
    Abstract: A tessellation method includes assigning a tessellation factor to each of a plurality of points in a patch and generating, in the vicinity of a first point of the plurality of points, at least one new point based on a first tessellation factor assigned to the first point. The at least one first new point corresponds to the first point.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: October 3, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seok Hoon Kim, Yong Ha Park, Chang Hyo Yu, Kil Whan Lee
  • Patent number: 9741158
    Abstract: A graphics processing unit (GPU) is provided. The GPU includes a tiling unit and a rasterizer. The tiling unit is configured to determines primitives touching a corresponding tile in tiles in an image frame, to determine at least one representative primitive of the primitives using a depth value of each of the primitives, and to generate visible primitives of the primitives for the corresponding tile using a depth value of the at least one representative primitive. The rasterizer is configured to rasterize the at least one representative and the visible primitives.
    Type: Grant
    Filed: April 17, 2014
    Date of Patent: August 22, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hong-Yun Kim, Chang-Hyo Yu
  • Patent number: 9665980
    Abstract: A method of operating a graphics processing unit includes determining, based on input data, whether to perform a tiling operation before or after a tessellation operation and performing the tiling operation according to the determination result. Performing the tiling operation after the tessellation operation if the input data is not a patch, and if a geometry of the patch is at the out-side of a convex hull defined by control points of the patch. Performing the tiling operation after the tessellation operation if a geometry of a tessellated primitive corresponding to the patch changes according to a shading operation.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: May 30, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seok Hoon Kim, Yong Ha Park, Chang Hyo Yu, Kil Whan Lee
  • Patent number: 9582935
    Abstract: A tessellation method includes determining whether a previous tag the same as a current tag of a current patch is stored in a cache, and transmitting a previous tessellation pattern corresponding to the previous tag stored in the cache to a domain shader when a cache hit occurs. The method may further include, when a cache miss occurs, generating a current tessellation pattern corresponding to the current patch using a tessellator and transmitting the generated current tessellation pattern to the domain shader, and storing the generated current tessellation pattern in the cache.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: February 28, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seok Hoon Kim, Chang Hyo Yu
  • Patent number: 9552618
    Abstract: A method for domain shading may include analyzing graphics state data, and generating all first primitives through a single-pass domain shading or generating only second primitives which are visible among the first primitives through a two-pass domain shading based on a result of the analysis.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: January 24, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang Hyo Yu, Seok Hoon Kim
  • Patent number: 9460559
    Abstract: A method of generating tessellation data include analyzing patch data of each of a plurality of patches; generating shared data that is shared by the patches, non-shared data that are not shared by the patches, and attribute data on an attribute of control points of each of the patches from the patch data according to a result of the analyzing; and compressing the non-shared data and the attribute data.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: October 4, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seok Hoon Kim, Chang Hyo Yu, Kil Whan Lee, Yong Ha Park
  • Publication number: 20160155209
    Abstract: A graphics processing unit (GPU) for determining whether to perform tessellation on a first model according to a control of a central processing unit (CPU) is provided. The GPU reads the first model from a memory, which stores prepared models having different complexities; calculates a complexity of the first model; compares the calculated complexity with a reference complexity; and determines whether to perform a tessellation operation on the first model according to a comparison result.
    Type: Application
    Filed: August 11, 2015
    Publication date: June 2, 2016
    Inventors: Seok Hoon Kim, Chang Hyo Yu
  • Publication number: 20160110914
    Abstract: A graphic processing unit includes a geometry processing unit and a rendering processing unit. The geometry processing unit is configured to receive vertexes and to generate at least one primitive using the vertexes. The rendering processing unit is configured to convert the generated at least one primitive into fragments, to perform fragment shading on the converted fragments, and to perform anti-aliasing on the fragments on which the fragment shading has been performed. The rendering processing unit performs the anti-aliasing on first color data and second color data that is different from the first color data using different operations from each other.
    Type: Application
    Filed: August 25, 2015
    Publication date: April 21, 2016
    Inventors: YONG-KWON CHO, CHANG-HYO YU
  • Publication number: 20160071317
    Abstract: A graphics processing unit (GPU) includes a subdivider connected between a vertex shader and a domain shader. The subdivider receives first points of a first patch from the vertex shader, computes and assigns a tessellation factor for the first patch, generates second patches by refining the first patch using the first points and the tessellation factor, determines whether each of the second patches satisfies a tessellation criterion, and feeds back a patch that does not satisfy the tessellation criterion among the second patches to an input of the subdivider as a first feedback patch.
    Type: Application
    Filed: July 29, 2015
    Publication date: March 10, 2016
    Inventors: Seok Hoon KIM, Chang Hyo YU
  • Publication number: 20150234664
    Abstract: A multimedia data processing method is provided which includes providing a conflict detection unit at a load/store pipeline unit; generating, by the conflict detection unit, speculative conflict information, which is used to predictively determine whether an address of a load/store instruction of a current thread causes a conflict miss before a cache access operation is performed by performing a history search for load/store instruction addresses of previous threads without referring to a cache memory; and storing information of the current thread directly in a standby buffer without an execution of the cache access operation in response to the generated speculative conflict information indicating the conflict miss.
    Type: Application
    Filed: February 10, 2015
    Publication date: August 20, 2015
    Inventors: Hyo-Eun Kim, Chang-Hyo Yu, Seok-Hoon Kim, Yongha Park, Kilwhan Lee
  • Publication number: 20150228111
    Abstract: A graphics processing unit (GPU) that performs rendering in units of tiles includes a coefficient generator that produces an interpolation coefficient based on coordinates of vertices of a primitive included in a first tile and a second tile; an interpolator that produces barycentric coordinates in respective pixels for the first tile of the primitive and pixel values in the first tile corresponding to the primitive, based on the interpolation coefficient, and a storage configured to store the interpolation coefficient. The GPU produces barycentric coordinates in and pixel values of respective pixels for a second tile of the primitive, based on the interpolation coefficient stored in the storage.
    Type: Application
    Filed: February 9, 2015
    Publication date: August 13, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hong Yun KIM, Chang Hyo YU
  • Patent number: 9092906
    Abstract: A graphic processor includes a rasterizer configured to process vertex data to generate fragment data based on a maximum depth value, a minimum depth value, and a mask bit of each pixel included in one tile, each mask bit indicating whether each pixel is drawn or not, the vertex data including three dimensional information of the pixels, a pixel shader configured to process the fragment data to generate color data, and a raster operation unit configured to convert the color data to pixel data to be displayed.
    Type: Grant
    Filed: October 20, 2011
    Date of Patent: July 28, 2015
    Assignees: SAMSUNG ELECTRONICS CO., LTD., KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Chang-Hyo Yu, Lee-Sup Kim, Hong-Yun Kim
  • Publication number: 20150170406
    Abstract: A graphic processing unit includes a primitive assembler configured to produce position information of a first primitive and position information of a second primitive; and a visibility tester configured to perform a visibility test based on position information of the second primitive and triangle correlation information of the first primitive, and, prior to operating a rasterizer, remove the second primitive based on a result of the visibility test.
    Type: Application
    Filed: November 21, 2014
    Publication date: June 18, 2015
    Inventors: Chang Hyo Yu, Seok Hoon Kim
  • Publication number: 20150138197
    Abstract: A method for domain shading may include analyzing graphics state data, and generating all first primitives through a single-pass domain shading or generating only second primitives which are visible among the first primitives through a two-pass domain shading based on a result of the analysis.
    Type: Application
    Filed: November 6, 2014
    Publication date: May 21, 2015
    Inventors: Chang Hyo YU, Seok Hoon KIM