Abstract: A semiconductor memory apparatus includes a plurality of stacked semiconductor dies including a first semiconductor die comprising a first internal circuit configured to control input timing of a test control signal that is output as a plurality of delayed test control signals to the plurality of stacked semiconductor dies according to the controlled input timing in response to a test mode signal.

Abstract: A voltage generation circuit includes: a periodic wave generator that generates an on/off signal that is periodically enabled/disabled, where at least one between a period and a duty cycle of the on/off signal is controlled based on at least one information among temperature information, capacitance information, leakage current information, speed information, and voltage level information; and an internal voltage generator that is enabled/disabled in response to the on/off signal and generates an internal voltage.

Abstract: Disclosed are a brainwave sensor unit and a brainwave measurement apparatus using the same. The brainwave sensor unit includes first and second contact electrodes located on a supporter, the first contact electrode obtains a brainwave signal from a living body, and the second contact electrode is spaced apart and electrically insulated from the first contact electrode and is grounded.

Abstract: A semiconductor system includes a first semiconductor device and a second semiconductor device. The first semiconductor device outputs a power supply voltage and first data. The second semiconductor device generates a control voltage whose level is adjusted in response to the power supply voltage. The second semiconductor device also receives the first data to generate second data having a swing width different from a swing width of the first data. The second data being driven is controlled by the control voltage.

Abstract: A method and apparatus for controlling home devices on a group basis in a home network system are provided. The method includes collecting operation state information about a plurality of home devices, generating control history information about the plurality of home devices based on the collected operation state information, receiving a group control command for a group of home devices from among the plurality of home devices, the group of home devices being set based on the control history information, and controlling operations of the group of home devices according to the received group control command.

Abstract: A control method and system for preventing misoperation of a shift lever of a vehicle are provided. In particular, when a driver manipulates the shift lever to select an automatic transmission mode or a manual transmission mode, shifting into an unintended mode attributable to misoperation is prevented. Therefore, the control method and system improve reliability in manipulating the shift lever and provide a safe driving environment to a driver.

Abstract: A vertical memory device includes a substrate, a column of vertical channels on the substrate and spaced apart along a direction parallel to the substrate, respective charge storage structures on sidewalls of respective ones of the vertical channels and gate electrodes vertically spaced along the charge storage structures. The vertical memory device further includes an isolation pattern disposed adjacent the column of vertical channels and including vertical extension portions extending parallel to the vertical channels and connection portions extending between adjacent ones of the vertical extension portions.

Abstract: Semiconductor devices are provided. The semiconductor devices may include a substrate, a ground selection gate electrode, and a channel structure. The channel structure may extend the ground selection gate electrode in a first direction perpendicular to a top surface of the substrate, and include a channel layer, a channel contact layer, and a stepped portion. The channel contact layer may contact the substrate and include a first width in a second direction perpendicular to the first direction. The channel layer may contact the channel contact layer, include a bottom surface between a bottom surface of the ground selection gate electrode and the top surface of the substrate in the first direction, and include a second width in the second direction different from the first width.

Abstract: A P-range engagement method of the vehicle and a device thereof are disclosed. The P-range engagement method is applied to the vehicle equipped with an electronic shift lever, and the method includes performing the vehicle stopping process based on detection of stopping of a traveling vehicle through a control device, holding wheel disks of the vehicle through a controller that is controlled by the control device, comparing the vehicle stopped time period, which is measured by the control device, with a predetermined reference value stored in the control device to determine whether the vehicle stopped time period exceeds the predetermined reference value, and upon determining that the vehicle stopped time period exceeds the predetermined reference value, determining whether conditions for performing P-range engagement are satisfied, and upon determining that the conditions for performing the P-range engagement are satisfied, completing the P-range engagement.

Abstract: A video encoding method and apparatus and a video decoding method and apparatus are provided. The video encoding method includes: prediction encoding in units of a coding unit as a data unit for encoding a picture, by using partitions determined based on a first partition mode and a partition level, so as to select a partition for outputting an encoding result from among the determined partitions; and encoding and outputting partition information representing a first partition mode and a partition level of the selected partition. The first partition mode represents a shape and directionality of a partition as a data unit for performing the prediction encoding on the coding unit, and the partition level represents a degree to which the coding unit is split into partitions for detailed motion prediction.

Abstract: Methods of operating a nonvolatile memory device include performing erase loops on a memory block using a first voltage, performing program loops on memory cells of the memory block using a second voltage, and increasing the first and second voltages based on program/erase cycle information for the memory cells. The first voltage may include an erase verification voltage and the second voltage may include a program voltage.

Abstract: A video encoding method and apparatus and a video decoding method and apparatus are provided. The video encoding method includes: prediction encoding in units of a coding unit as a data unit for encoding a picture, by using partitions determined based on a first partition mode and a partition level, so as to select a partition for outputting an encoding result from among the determined partitions; and encoding and outputting partition information representing a first partition mode and a partition level of the selected partition. The first partition mode represents a shape and directionality of a partition as a data unit for performing the prediction encoding on the coding unit, and the partition level represents a degree to which the coding unit is split into partitions for detailed motion prediction.

Abstract: A non-volatile memory device including a cell array area including a plurality of memory cells and word lines and bit lines, which are connected to the plurality of memory cells, a core circuit area including a page buffer circuit and a row decoder circuit, the pager buffer circuit configured to temporarily store data input to and output from the plurality of memory cells, and the row decoder circuit configured to select some of the word lines corresponding to an address input thereto, and an input/output circuit area including a data input/output buffer circuit, the data input/output buffer circuit configured to at least one of transmit data to the page buffer circuit and receive data from the page buffer circuit, and the input/output circuit area including at least one asymmetrical transistor having a source region and a drain region asymmetrically disposed with respect to the gate structure may be provided.

Abstract: A non-volatile memory device includes a semiconductor substrate and a tunnel insulating layer and a gate electrode. A multiple tunnel insulation layer with a plurality of layers, a charge storage insulation layer, and a multiple blocking insulation layer with layers are sequentially stacked between the gate electrode and the tunnel insulating layer. A first diffusion region and a second diffusion region in the semiconductor substrate are adjacent to opposite respective sides of the gate electrode. When a voltage is applied to the gate electrode and the semiconductor substrate to form a voltage level difference therebetween, a minimum field in the tunnel insulation layer is stronger than in the blocking insulation layer. A minimum field at a blocking insulation layer can be stronger than at a tunnel insulation layer, and the migration probability of charges through the tunnel insulation layer can be higher than through the blocking insulation layer.

Abstract: According to example embodiments, a vertical memory device includes a low resistance layer on a lower insulation layer, a channel layer on the low resistance layer, a plurality of vertical channels on the channel layer, and a plurality of gate lines. The vertical channels extend in a first direction that is perpendicular with respect to a top surface of the channel layer. The gate lines surround outer sidewalls of the vertical channels, and are stacked in the first direction and are spaced apart from each other.

Abstract: An antenna including a planar radiator that exhibits the same shape at least twice in response to a 360-degree rotation based on a single virtual line and has a plurality of conductive legs connected to the planar radiator. The conductive legs exhibit the same shape at least twice in response to the 360-degree rotation based on the single virtual line. An antenna module that includes an antenna exhibiting the same shape at least twice in response to a 360-degree rotation based on a single virtual line with the antenna having a planar radiator and a plurality of conductive legs connected to the planar radiator. The antenna module also includes a substrate having a plurality of pads each corresponding to one of the conductive legs of the antenna.

Abstract: An electronic brake lamp switch may include an application-specific integrated circuit (ASIC) configured to generate a signal for turning on a brake lamp, an first output signal, and a second output signal, respectively, when a brake pedal is pressed and configured to package electrical elements for preventing failure when the failure such as outside overvoltage, abnormal surge or short circuit able to be generated on an output terminal occurs, and a printed circuit board (PCB) configured to receive power for operating the application-specific integrated circuit and to which the ASIC is mounted.

Abstract: A voltage generation circuit includes: a periodic wave generator that generates an on/off signal that is periodically enabled/disabled, where at least one between a period and a duty cycle of the on/off signal is controlled based on at least one information among temperature information, capacitance information, leakage current information, speed information, and voltage level information; and an internal voltage generator that is enabled/disabled in response to the on/off signal and generates an internal voltage.

Abstract: A control method and system for preventing misoperation of a shift lever of a vehicle are provided. In particular, when a driver manipulates the shift lever to select an automatic transmission mode or a manual transmission mode, shifting into an unintended mode attributable to misoperation is prevented. Therefore, the control method and system improve reliability in manipulating the shift lever and provide a safe driving environment to a driver.

Abstract: A nonvolatile memory device includes a memory cell array and a voltage generator. The memory cell array includes a plurality of planes, and each plane receives one of a first ground selection voltage and a second ground selection voltage. The voltage generator is configured to provide selectively one of the first ground selection voltage and the second ground selection voltage independently to each of the planes based on a result of an erase verification operation on each of the plurality of planes.