Abstract: A method and an apparatus for manufacturing coal briquettes capable of implementing excellent cold strength and hot strength by separating and crushing coal per each kind of coals are provided. In the manufacturing method of coal briquettes, the coal briquettes are charged into a dome part of a melter-gasifier to be rapidly heated in a manufacturing apparatus of molten iron including i) a melter-gasifier in which reduced iron is charged, and ii) a reducing furnace connected to the melter-gasifier and providing the reduced iron. The manufacturing method of coal briquettes includes: i) providing a plurality of kinds of coal; ii) storing the plurality of kinds of coal, respectively; iii) providing powdered coals by crushing the plurality of kinds of coal, respectively; iv) providing mixtures by mixing the powdered coal, a hardening agent, and a binder; and v) providing coal briquettes by molding the mixture.

Abstract: A memory card system includes a host that issues a read command and a memory card that upon receiving the read command sends read data to the host in synchronism with a read clock signal generated within the memory card. In addition, the memory card sends the read clock signal to the host, and the host receives the read data in synchronism with the read clock signal, for increasing the allowable setup time period at the host.

Abstract: A memory card system includes a host that issues a read command and a memory card that upon receiving the read command sends read data to the host in synchronism with a read clock signal generated within the memory card. In addition, the memory card sends the read clock signal to the host, and the host receives the read data in synchronism with the read clock signal, for increasing the allowable setup time period at the host.

Abstract: A memory card system includes a host that issues a read command and a memory card that upon receiving the read command sends read data to the host in synchronism with a read clock signal generated within the memory card. In addition, the memory card sends the read clock signal to the host, and the host receives the read data in synchronism with the read clock signal, for increasing the allowable setup time period at the host.

Abstract: A memory controller and method of operating same are described. The memory controller includes a central processing unit providing re-transmission control signal, an error check block determining whether an error exists in data received from a host and generating a corresponding error check signal, and a re-transmission request unit receiving the control signal and the error check signal, communicating a request to the host for an error-correcting re-transmission operation when an error exists in the received data, and communicating a request for an extending re-transmission operation when error does not exist in the received data.

Abstract: A memory card system includes a host that issues a read command and a memory card that upon receiving the read command sends read data to the host in synchronism with a read clock signal generated within the memory card. In addition, the memory card sends the read clock signal to the host, and the host receives the read data in synchronism with the read clock signal, for increasing the allowable setup time period at the host.

Abstract: A memory card system includes a host that issues a read command and a memory card that upon receiving the read command sends read data to the host in synchronism with a read clock signal generated within the memory card. In addition, the memory card sends the read clock signal to the host, and the host receives the read data in synchronism with the read clock signal, for increasing the allowable setup time period at the host.

Abstract: A memory controller and method of operating same are described. The memory controller includes a central processing unit providing re-transmission control signal, an error check block determining whether an error exists in data received from a host and generating a corresponding error check signal, and a re-transmission request unit receiving the control signal and the error check signal, communicating a request to the host for an error-correcting re-transmission operation when an error exists in the received data, and communicating a request for an extending re-transmission operation when error does not exist in the received data.

Abstract: A multi-interface controller having a first logic circuit and a second logic circuit. The first logic circuit supports a first interface. The second logic circuit supports a second interface. The first logic circuit is enabled based on a first command. The second logic circuit is enabled based on a second command.

Abstract: An apparatus for controlling a flash memory device which includes a signal generator for generating a clock signal at an operation, a first buffer for outputting the clock signal to the flash memory device as a clock enable signal, a second buffer for receiving data from the flash memory device in synchronization with the clock enable signal, a third buffer for receiving and outputting an output of the first buffer, and a latch circuit for latching an output of the second buffer in synchronization with output of the third buffer.

Abstract: Provided is a flash memory having a multi-level cell (MLC) and a method of programming the same. The method includes identifying a set of first patterns from input data, determining whether there is a set of second patterns stored within the flash memory that is of a number substantially similar to the number of the first patterns, and programming the input data as a most significant bit (MSB) in a location of the flash memory where the identified set of second patterns is stored when it is determined that there is a set of second patterns stored within the flash memory that is of a number substantially similar to the number of first patterns.

Abstract: A memory card system includes a host that issues a read command and a memory card that upon receiving the read command sends read data to the host in synchronism with a read clock signal generated within the memory card. In addition, the memory card sends the read clock signal to the host, and the host receives the read data in synchronism with the read clock signal, for increasing the allowable setup time period at the host.

Abstract: A removable memory card can include a plurality of connector contacts including a Universal Serial Bus (USB) controller module power contact and a separate controller module power contact configured to provide separate mutually exclusively applied voltage to the removable memory card.

Abstract: An apparatus for controlling a flash memory device which includes a signal generator for generating a clock signal at an operation, a first buffer for outputting the clock signal to the flash memory device as a clock enable signal a second buffer for receiving data from the flash memory device in synchronization with the clock enable signal, a third buffer for receiving and outputting an output of the first buffer, and a latch circuit for latching an output of the second buffer in synchronization with output of the third buffer.

Abstract: An example embodiment provides a semiconductor memory device. The semiconductor memory device may include an output driver, a delay circuit and an output driver controlling circuit. The output driver may output an external output signal in response to an internal output signal. The delay circuit may receive the internal output signal to generate one or more delay signals. The output driver controlling circuit may receive the external output signal to generate control signals synchronized with the delay signals. The drive ability of the output driver is controlled by the generated control signals.

Abstract: A Multimedia (MMC)/Secure Digital (SD) form-factor compliant card apparatus can include a mode determining circuit connected to first and second pins of the card apparatus and configured to determine a type of host connected to the first and second pins based on comparing voltages at the first and second pins to an internal voltage level. Related adaptors and methods are also disclosed.

Abstract: A removable memory card can include a plurality of connector contacts including a Universal Serial Bus (USB) controller module power contact and a separate controller module power contact configured to provide separate mutually exclusively applied voltage to the removable memory card.

Abstract: A multi-interface controller having a first logic circuit and a second logic circuit. The first logic circuit supports a first interface. The second logic circuit supports a second interface. The first logic circuit is enabled based on a first command. The second logic circuit is enabled based on a second command.

Abstract: A semiconductor device may include a chip-on-board (COB) substrate having bonding patterns. A semiconductor chip having bonding pads may be electrically connected to the bonding patterns and may be arranged on the COB substrate, and the semiconductor chip may have a square shape and the bonding pads of the semiconductor chip may be arranged along at least two sides of the semiconductor chip so as to form a desired angle with respect to the bonding patterns.

Abstract: A Multimedia (MMC)/Secure Digital (SD) form-factor compliant card apparatus can include a mode determining circuit connected to first and second pins of the card apparatus and configured to determine a type of host connected to the first and second pins based on comparing voltages at the first and second pins to an internal voltage level. Related adaptors and methods are also disclosed.