Abstract: Provided is a substrate processing apparatus. The positions of a first electrode and a second electrode are adjusted in advance in consideration of differences in coefficients of thermal expansion so that a short circuit created by contact between the first electrode and the second electrode is prevented even in the case in which the first electrode and the second electrode are thermally expanded during processing. Even in the case in which the first electrode and the second electrode are thermally expanded due to an increase in temperature during processing, a short circuit between the first electrode and the second electrode can be prevented, and the uniformity of a thin film can be maintained in the substrate processing apparatus for processing a large substrate.

Abstract: A vehicle body assembly includes a cross member configured to connect side members disposed at two opposite sides of a chassis frame of a vehicle. A battery is fastened to the cross member and the battery is fastened to a reinforcement member provided on a floor panel of a vehicle body and fastened to the cross member of the chassis frame. The battery may be installed in and removed from the vehicle in accordance with a user's needs that change even after the vehicle is manufactured, the battery of the vehicle may be replaced even after the vehicle is manufactured, and structural durability may be realized.

Abstract: A vehicle front subframe includes: a pair of longitudinal members each extending in a longitudinal direction of a vehicle and having a mounting recess; an inner reinforcing member mounted in an inner cavity of each longitudinal member; and a suspension arm having a mount mounted in the mounting recess of each longitudinal member through a mount member.

Abstract: An apparatus for estimating biological information may include a sensor configured to detect a first light signal and a second light signal from an object of a user and a processor configured to determine whether a condition for estimating biological information is satisfied based on the detected first light signal and estimate biological information based on the second light signal, wherein the sensor includes a force sensor configured to measure a force applied to the object when the object is in contact with a cover surface of the sensor.

Abstract: A substrate processing device. The device comprises: a first source supply unit; a second source supply unit; a first supply line for connecting the first source supply unit to a spraying unit; a second supply line for connecting the second source supply unit to the spraying unit; a mixing unit provided at the first supply line to be arranged between the first source supply unit and the spraying unit; a first connection line for connecting the second supply line to the first supply line and/or the mixing unit; and a first path change unit provided at a first connection point at which the first connection line is connected to the second supply line, wherein the first path change unit changes the flow path of a second source gas supplied from the second source supply unit.

Abstract: An apparatus is provided for limiting the effective utilisation of an instruction fetch queue. The instruction fetch entries are used to control the prefetching of instructions from memory, such that those instructions are stored in an instruction cache prior to being required by execution circuitry while executing a program. By limiting the effective utilisation of the instruction fetch queue, fewer instructions will be prefetched and fewer instructions will be allocated to the instruction cache, thus causing fewer evictions from the instruction cache. In the event that the instruction fetch entries are for instructions that are unnecessary to the program, the pollution of the instruction cache with these unnecessary instructions can be mitigated.

Abstract: A data processing apparatus includes receive circuitry that receives an indication of a trigger block of instructions.

Abstract: A data processing apparatus and a method are disclosed.

Abstract: An apparatus has a fetch queue to identify a sequence of instructions to be fetched for execution and prediction circuitry to predict upcoming control flow and to control which instructions are identified in the fetch queue in dependence on the prediction. The prediction circuitry predicts multi-taken sequences which are sequences of instructions in which control flow is diverted by a first control flow changing instruction to a series of instructions terminating in a second control flow changing instruction that diverts control flow to a target address. The apparatus also has prediction confidence calculation circuitry to calculate confidence levels for respective multi-taken sequences. Each confidence level is indicative of a confidence in an accuracy of prediction of its respective multi-taken sequence.

Abstract: An apparatus comprises first-level and second-level set-associative caches each comprising the same number of sets of cache entries. Indexing circuitry generates, based on a lookup address, a set index identifying which set of the first-level set-associative cache or the second-level set-associative cache is a selected set of cache entries to be looked up for information associated with the lookup address. The indexing circuitry generates the set index using an indexing scheme which maps the lookup address to the same set index for both the first-level set-associative cache and the second-level set-associative cache. This can make migration of cached information between the cache levels more efficient, which can be particularly useful for caches with high access frequency, such as branch target buffers for a branch predictor.

Abstract: There is provided a data processing apparatus and method for storing a plurality of prediction cache entries in a prediction cache with associativity greater than one comprising a plurality of prediction cache ways, each of the plurality of prediction entries defining an association between a prediction cache lookup address and target information; and storing a plurality of stream entries, each stream entry corresponding to a sequence of prediction cache lookup addresses and comprising: a stream identifier defined by two or more sequential prediction cache lookup addresses of the sequence, and a plurality of sequential way predictions, each way prediction of the plurality of sequential way predictions defining, for a given position in the sequence of prediction cache lookup addresses, a prediction cache way to be looked up in the prediction cache to identify a prediction entry associated with the prediction cache lookup address at the given position in the sequence.

Abstract: First and second-level caches are provided. Cache control circuitry performs a first-level cache lookup of the first-level cache based on a lookup address, to determine whether the first-level cache stores valid cached data corresponding to the lookup address. When lookup hint information associated with the lookup address is available, the cache control circuitry determines based on the lookup hint information whether to activate or deactivate a second-level cache lookup of the second-level cache. The lookup hint information is indicative of whether the second-level cache is predicted to store valid cached data associated with the lookup address. When the second-level cache lookup is activated, the second-level cache lookup of the second-level cache is performed based on the lookup address to determine whether the second-level cache stores valid cached data corresponding to the lookup address.

Abstract: First and second-level caches are provided. Cache control circuitry performs a first-level cache lookup of the first-level cache based on a lookup address, to determine whether the first-level cache stores valid cached data corresponding to the lookup address. When lookup hint information associated with the lookup address is available, the cache control circuitry determines based on the lookup hint information whether to activate or deactivate a second-level cache lookup of the second-level cache. The lookup hint information is indicative of whether the second-level cache is predicted to store valid cached data associated with the lookup address. When the second-level cache lookup is activated, the second-level cache lookup of the second-level cache is performed based on the lookup address to determine whether the second-level cache stores valid cached data corresponding to the lookup address.

Abstract: An apparatus comprises first-level and second-level set-associative caches each comprising the same number of sets of cache entries. Indexing circuitry generates, based on a lookup address, a set index identifying which set of the first-level set-associative cache or the second-level set-associative cache is a selected set of cache entries to be looked up for information associated with the lookup address. The indexing circuitry generates the set index using an indexing scheme which maps the lookup address to the same set index for both the first-level set-associative cache and the second-level set-associative cache. This can make migration of cached information between the cache levels more efficient, which can be particularly useful for caches with high access frequency, such as branch target buffers for a branch predictor.

Abstract: A data processing apparatus and a method are disclosed.

Abstract: An engine structure includes a cylinder block, a cylinder liner, a block water jacket formed between the cylinder block and the cylinder liner, a block insert assembly inserted into the block water jacket, and an cylinder head. In particular, the block insert assembly includes: a first block insert and a second block insert, which are disposed between the cylinder liner and the cylinder block. One side end portion of the first block insert, which is adjacent to a block coolant inlet side, has a first flow resistor for sealing only a partial space of the space between the cylinder block and the cylinder liner, and one side end portion of the second block insert, which is adjacent to the block coolant inlet side, has a second flow resistor for sealing the entire space between the cylinder block and the cylinder liner.

Abstract: An integrated flow control valve apparatus for controlling a flow rate of coolant in an engine cooling system for cooling an engine including a cylinder block and a cylinder head mounted above the cylinder block, includes a valve housing; a plurality of coolant ports formed at the valve housing and provided as inlets and outlets through which the coolant flows into and out of the valve housing; and valves configured for opening and closing the coolant ports, wherein the coolant ports include a first inlet port for introduction of the coolant from the cylinder block and a second inlet port for introduction of the coolant from the cylinder head into the valve housing; and the flow of the coolant at the first and second inlet ports is controlled by the valves configured to vary the flow of the coolant in the cylinder block and the cylinder head.

Abstract: An integrated flow control valve apparatus configured to control a flow rate of coolant in an engine cooling system for cooling an engine may include a cylinder block and a cylinder head mounted above the cylinder block, the integrated flow control valve apparatus may include a valve housing; a plurality of coolant ports formed at the valve housing and provided as inlets and outlets through which the coolant flows into and out of the valve housing; and valves configured for opening and closing the coolant ports, wherein the coolant ports include a first inlet port for introduction of the coolant from the cylinder block and a second inlet port for introduction of the coolant from the cylinder head into the valve housing; and the flow of the coolant at the first and second inlet ports is controlled by the valves configured to vary the flow of the coolant in the cylinder block and the cylinder head.

Abstract: An engine structure includes a cylinder block, a cylinder liner, a block water jacket formed between the cylinder block and the cylinder liner, a block insert assembly inserted into the block water jacket, and an cylinder head. In particular, the block insert assembly includes: a first block insert and a second block insert, which are disposed between the cylinder liner and the cylinder block. One side end portion of the first block insert, which is adjacent to a block coolant inlet side, has a first flow resistor for sealing only a partial space of the space between the cylinder block and the cylinder liner, and one side end portion of the second block insert, which is adjacent to the block coolant inlet side, has a second flow resistor for sealing the entire space between the cylinder block and the cylinder liner.

Abstract: There is provided a multi-layered ceramic electronic component including a ceramic body including a dielectric layer, first and second internal electrodes disposed within the ceramic body so as to face each other, having the dielectric layer interposed therebetween, and a first external electrode electrically connected to the first internal electrodes and a second external electrode electrically connected to the second internal electrodes, wherein the first and second external electrodes include a conductive metal and glass and further include a second phase material occupying an area of 1 to 80% with respect to an area of glass in the first and second external electrodes.