Abstract: A conductive composite material, a method of preparing the same, and a secondary battery including the same. The conductive composite material may increase the proportion of an active material when forming an electrode by chemically bonding a conductive material and a binder to each other. A method of preparing the conductive composite material comprises ionizing carbon-based particles in a predetermined polarity, ionizing PTFE particles in a polarity different from that of the carbon-based particles, and chemically bonding the ionized carbon-based particles and the ionized PTFE particles, which are ionized in different polarities, to each other.

Abstract: The present invention discloses an encoding apparatus using a Discrete Cosine Transform (DCT) scanning, which includes a mode selection means for selecting an optimal mode for intra prediction; an intra prediction means for performing intra prediction onto video inputted based on the mode selected in the mode selection means; a DCT and quantization means for performing DCT and quantization onto residual coefficients of a block outputted from the intra prediction means; and an entropy encoding means for performing entropy encoding onto DCT coefficients acquired from the DCT and quantization by using a scanning mode decided based on pixel similarity of the residual coefficients.

Abstract: The present invention relates to a tuning circuit, more specifically to a tuning circuit for continuous-time filter capable of making exact the Gm value to minimize the variation of the cutoff frequency due to the variation of process in the Gm-C type of continuous-time filter.

Abstract: A CMOS high frequency variable gain amplifier with maximum high frequency operation and wide variable gain characteristics that is formed from an amplifier having a plurality of variable gain amplifier cells connected in series for continuously enabling wide gain variation; and a control voltage generator for generating and outputting the control voltage of the variable gain amplifier cells. By using both the saturation region and the linear region of input differential transistors constituting the variable gain amplifier cells in order to obtain wide gain variation characteristics, it is possible for the variable gain amplifier to operate in the saturation region when the input signal is small to obtain a high gain and to operate in the linear region when the input signal is large to obtain minimum distortion and a low gain. Also, it is possible for the gain to have the characteristics in the form of an exponential function to the gain control voltage.

Abstract: The present invention discloses a mixer using a replica voltage-current converter, and more particularly a mixer using the replica voltage-current (V-I) converter of the present invention, which feedbacks the output current of the replica voltage-current converter using an additional amplifier so as to improve the linearity thereof by the gain of the amplifier because the conventional mixer operating at a high speed dissipates a lot of electrical power to have low output impedance.

Abstract: There is disclosed a low frequency filter. A low frequency cutoff filter includes a filter circuit having a capacitor connected between an input terminal and an output terminal and an active resistor connected to the output terminal, having a very large resistance, and a bias circuit having a negative feedback to set a biasing voltage of the active resistor to a desired value, thereby implementing the cutoff filter within a semiconductor chip as one set with the capacitor having a small capacitance. A low frequency pass filter includes an active resistor having a very large resistance, means for setting a biasing voltage of the active resistor to a desired value, and a capacitor connected between the output terminal and the ground. Therefore, the low pass filter can be integrated-circuited using even small capacitor.

Abstract: A double mode modulator, particularly, for a portable telephone, which is adapted to realize both digital and analog modulations and have a low phase noise and a reduced locking time with a device readily integrated in an integrated circuit, including: a frequency synthesizer for synthesizing a particular frequency from an external reference clock signal; a digital modulator for performing a quadrature modulation for an output signal of the frequency synthesizer; and an analog modulator for performing a frequency modulation for the output signal of the frequency synthesizer.

Abstract: A CMOS offset trimming circuit and offset generation circuit for obtaining the corrected optimum offset value for correcting the offset generated in the CMOS analog circuit. An offset trimming circuit comprises a flip-flop for loading a data to be used for obtaining an optimum offset value or a data to be trimmed according to an input clock, a fuse circuit for setting the circuit with a corrected optimum offset value obtained in a corresponding mode by receiving the data loaded on the flip-flop and the mode selection signal as an input signal, and a selection logic circuit for outputting a selected signal as a trimming output signal by selecting one from the group consisting of the data loaded on the flip-flop and the data output from the fuse circuit according to the operation mode.

Abstract: An integrated circuit built-in type power delay circuit which is capable of supplying a stable supply power to each circuit of the integrated circuit by generating a supply power control signal voltage after a predetermined time. The circuit includes a receiving unit for receiving a supply voltage VDD and charging the same, a supplying unit for supplying a current, an inverting unit for inverting an output value from the charging unit, a switching unit controlled in accordance with an output value from the inverting unit for switching an output from the current supply unit, a current regenerating unit for receiving a control of the switching unit and discharging an output value from the charging unit, an electric potential value conversion unit controlled by an output value from the inverting unit for converting an output value from the charging unit into a low level, and a buffering unit for receiving an output value from the inverting unit for buffering the output value and outputting a non-inverted signal.

Abstract: A voltage control oscillation circuit for a CMOS which is capable of reducing phase noise and power consumption by adapting a voltage amplitude control loop and a common mode feedback circuit to a conventional LC-tank circuit. The circuit includes an LC-tank oscillation unit for outputting an oscillation voltage, an output common mode feedback unit for receiving an output from the LC-tank oscillation unit and eliminating a common mode noise of the output, and a voltage amplitude control unit for controlling a bias current of the LC-tank oscillation unit in accordance with a voltage difference at both ends of an LC-tank oscillation terminal which voltage is applied thereto through the output common mode feedback unit, for thus controlling the amount of an oscillation voltage.

Abstract: A capacitor type voltage divider circuit is disclosed. The divider has a plurality of reference voltage signals applied from an external source. A plurality of switching sections are provided for switching the reference voltage signals from the source in response to first and second clock signals. A plurality of dividing sections are provided which are each comprised of two capacitors for dividing the voltage signals from the switching section into a predetermined value. With the dividing circuit, precise levels of reference voltage signals are obtained and power consumption is low without an increase in size or lowering of operational speed.

Abstract: Disclosed is a low power-consumption type comparator circuit having two input terminals for receiving two input signals, one of which is an input reference signal and the other of which is an input comparison signal, and two output terminals, the circuit comprising signal converting portion for converting the input signals into current signals, respectively; switching portion for controlling transmission of the current signals to output terminals of the circuit in response to a latch signal indicating a latch operation or a normal operation of the circuit; high level holding portion for maintaining each voltage level of the output terminals to a logical high-state only when the latch operation of the circuit is not performed; amplifying/determining portion for amplifying the current signals and determining logical level of the input comparison signal; and output feedback portion for receiving output signals of the output terminals and enabling to make a current flowing in the circuit to a zero-state, only whi