Patents by Inventor Chang-Ki Park

Chang-Ki Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11987655
    Abstract: The present invention relates to polyolefin. More specifically, the present invention relate s to polyolefin having excellent dart drop impact strength, and exhibiting improved transparency and satisfying one of the following 1)˜4): 1) when density is 0.9165 g/cm3 or more and less than 0.9175 g/cm3, the content of SCB (Short Chain Branch) is 9.5 to 10.5 wt %, 2) when density is 0.9175 g/cm3 or more and less than 0.9185 g/cm3, the content of SCB (Short Chain Branch) is 9.0 to 10.0 wt %, 3) when density is 0.9185 g/cm3 or more and less than 0.9195 g/cm3, the content of SCB (Short Chain Branch) is 8.5 to 9.5 wt %, 4) when density is 0.9195 g/cm3 or more and less than 0.9205 g/cm3, the content of SCB (Short Chain Branch) is 7.5 to 8.5 wt %, wherein the density is measured according to ASTM D1505.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: May 21, 2024
    Assignee: LG Chem, Ltd.
    Inventors: Sung Min Lee, Jeongkyu Lee, Hyojoon Lee, Seyoung Kim, Sung Ho Park, Seul Ki Im, Jinyoung Lee, Chang Hwan Jang, Daesik Hong, Jisoo Song
  • Patent number: 11949046
    Abstract: A light-emitting element includes a first semiconductor layer doped to have a first polarity, a second semiconductor layer doped to have a second polarity different from the first polarity, a light-emitting layer disposed between the first and second semiconductor layers, a shell layer formed on side surfaces of the first semiconductor layer, the light-emitting layer, and the second semiconductor layer, the shell layer including a divalent metal element, and an insulating film covering an outer surface of the shell layer and surrounding the side surface of the light-emitting layer.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: April 2, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Se Hun Kim, Chang Hee Lee, Yun Hyuk Ko, Duk Ki Kim, Jun Woo Park, Soo Ho Lee, Jae Kook Ha, Yun Ku Jung
  • Patent number: 9348230
    Abstract: A method of manufacturing a semiconductor device includes: forming an etching mask layer on a semiconductor substrate having an etching target layer, patterning the etching mask layer to form a plurality of etching mask patterns, and forming a subsidiary layer surrounding the etching mask patterns having a uniform critical dimension and gap to form hard mask patterns including the subsidiary layer and the etching mask patterns.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: May 24, 2016
    Assignee: SK hynix Inc.
    Inventor: Chang Ki Park
  • Publication number: 20140045124
    Abstract: A method of manufacturing a semiconductor device includes: forming an etching mask layer on a semiconductor substrate having an etching target layer, patterning the etching mask layer to form a plurality of etching mask patterns, and forming a subsidiary layer surrounding the etching mask patterns having a uniform critical dimension and gap to form hard mask patterns including the subsidiary layer and the etching mask patterns.
    Type: Application
    Filed: December 14, 2012
    Publication date: February 13, 2014
    Applicant: SK hynix Inc.
    Inventor: Chang Ki PARK
  • Publication number: 20140045336
    Abstract: A method of manufacturing a semiconductor device having patterns with different widths. The method includes etching a sacrificial pattern using a protective pattern that has a greater width and remains during an etch process of a spacer layer. Since the sacrificial pattern that has a greater width and remains under the protective pattern having a greater width is used as a pad mask pattern, a separate process of forming a pad mask pattern may not be necessary. Therefore, a method of manufacturing a semiconductor device may be simplified.
    Type: Application
    Filed: December 14, 2012
    Publication date: February 13, 2014
    Applicant: SK HYNIX INC.
    Inventor: Chang Ki PARK
  • Publication number: 20120318535
    Abstract: The invention is about a panel type extinguisher vessel which is safe and secure and it is prevented from expanding deformation due to the pressurized extinguishing agent. The extinguisher vessel of the invention is in the shape of panel having a front plate and a rear plate with the inner space between them, and the vessel further includes a connecting member extending through the inner space to connect the front plate and the rear plate, and at least one of the reinforcing grooves are formed on the front plate and the rear plate.
    Type: Application
    Filed: November 29, 2010
    Publication date: December 20, 2012
    Applicant: FPG KOREA CO., LTD.
    Inventors: Dong Seob Park, Chang Ki Park
  • Patent number: 8003508
    Abstract: A method of forming a gate line of a semiconductor device, wherein when an etch process for forming a gate line is performed, a loading effect is improved, thereby enhancing the operating speed of a semiconductor device. According to a method of forming a gate line of a semiconductor device in accordance with an aspect of the invention, a stack layer is formed over a semiconductor substrate that includes a first area and a second area. Hard mask patterns are formed over the stack layer so that the hard mask patterns are denser in the first area than in the second area. Next, a loading compensation layer is formed before the stack layer is etched, or the loading compensation layer is deposited after the stack layer is partially etched. Accordingly, a loading effect occurring when the stack layer is etched can be offset.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: August 23, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Chang Ki Park
  • Publication number: 20100048014
    Abstract: A method of forming a gate line of a semiconductor device, wherein when an etch process for forming a gate line is performed, a loading effect is improved, thereby enhancing the operating speed of a semiconductor device. According to a method of forming a gate line of a semiconductor device in accordance with an aspect of the invention, a stack layer is formed over a semiconductor substrate that includes a first area and a second area. Hard mask patterns are formed over the stack layer so that the hard mask patterns are denser in the first area than in the second area. Next, a loading compensation layer is formed before the stack layer is etched, or the loading compensation layer is deposited after the stack layer is partially etched. Accordingly, a loading effect occurring when the stack layer is etched can be offset.
    Type: Application
    Filed: June 5, 2009
    Publication date: February 25, 2010
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Chang Ki PARK
  • Patent number: 7465672
    Abstract: The present invention relates to a method of forming an etching mask. According to the present invention, there is provided a method of forming an etching mask, comprising the steps of: depositing a hard mask film containing silicon on a substrate; depositing a photoresist on the hard mask film; patterning the photoresist; and etching the hard mask film using the photoresist pattern as an mask and using an etching gas including a CHxFy(x, y=1, 2, 3) gas. At this time, an etch selectivity of the hard mask film to the photoresist pattern can be increased using a mixed gas including CH2F2 and H2 gases when etching the hard mask film under the photoresist pattern used in a wavelength of 193 nm or less.
    Type: Grant
    Filed: November 2, 2006
    Date of Patent: December 16, 2008
    Assignee: Jusung Engineering Co., Ltd.
    Inventors: Gi-Chung Kwon, Nae-Eung Lee, Chang-Ki Park, Chun-Hee Lee, Duck-Ho Kim
  • Publication number: 20070114205
    Abstract: The present invention relates to a method of forming an etching mask. According to the present invention, there is provided a method of forming an etching mask, comprising the steps of: depositing a hard mask film containing silicon on a substrate; depositing a photoresist on the hard mask film; patterning the photoresist; and etching the hard mask film using the photoresist pattern as an mask and using an etching gas including a CHxFy(x, y=1, 2, 3) gas. At this time, an etch selectivity of the hard mask film to the photoresist pattern can be increased using a mixed gas including CH2F2 and H2 gases when etching the hard mask film under the photoresist pattern used in a wavelength of 193 nm or less.
    Type: Application
    Filed: November 2, 2006
    Publication date: May 24, 2007
    Applicant: JUSUNG ENGINEERING CO., LTD.
    Inventors: Gi-Chung KWON, Nae-Eung LEE, Chang-Ki PARK, Chun-Hee LEE, Duck-Ho KIM