Abstract: A method for collaborative controlling networks resilience of an unmanned cluster system a computer terminal and a computer readable storage media thereof are invented. The method includes: collecting both targets for tracking and the spatial status information of each unmanned system in the unmanned cluster system; establishing a kinematic model of the unmanned cluster system and constructing a dynamic model of each unmanned system accordingly; constructing an uncertainty boundary function and a adaptive robust controller of each unmanned system accordingly. Then it can effectively deal with the uncertainty of system parameters and the influence of network attack input of the unmanned cluster system by the present invention.

Abstract: A method for controlling voltage output is disclosed. The method is used to control a power supply module to provide a required operating voltage to a display panel, and a display frame of the display panel comprises a plurality of sequential row driving periods, each row driving period comprising a charging period and a non-charging period, wherein during the charging period, a connection between a data line and a corresponding row of sub-pixels is enabled so that data voltages are written into the corresponding sub-pixels. The method comprises controlling the power supply module to output an operating voltage at a preset first operating frequency during a display of a picture to be displayed, wherein a time period during which the power supply module outputs the operating voltage to the display panel does not overlap with the charging period of each row driving period.

Abstract: A capillary array includes a capillary region, including capillaries of a first glass, which are disposed in an axis-parallel manner. A low refractive index layer is disposed on an inner wall of each of the capillaries, the refractive index of each low refractive index layer being less than a refractive index of a liquid scintillator. A second glass material is disposed between adjacent capillaries. A softening point of the first glass is T1, a softening point of second glass is T2, and a value of T1 minus T2 is in a range from 30° C. to 50° C. A thermal expansion coefficient of the first glass is ?1. An edge covering region is disposed on an outer side of the capillary region and makes contact with an outer side face of the capillary region, wherein a material of the edge covering region is a third glass.

Abstract: A duplex printing device and an image offset correction method thereof are provided. In the duplex printing device, a paper medium is induced to pass through an image processing device by a first path and a second path respectively, and a processor calculates, drives and performs image processing technologies. When the paper medium passes through the first path and the second path, the first side alignment image and the second side deviation image of the paper medium are respectively obtained, and position deviation information is calculated according to the first side alignment image and the second side deviation image, and the light sensing position of the image processing device is adjusted to change a transfer print starting point according to the position deviation information. Thus, during next printing, transfer print information may be located on the center position of the second side of the paper medium with any size.

Abstract: A high voltage direct-mounted energy storage method and system for eliminating a frequency multiplying current in battery charge and discharge is provided.

Abstract: A system on chip comprises a first core cluster including a plurality of cores and executing a first virtual machine including a first debug client, and a second core cluster including a plurality of cores and executing a second virtual machine including a second debug client. A first core of the first core cluster and a second core of the second cluster execute a hypervisor at a first exception level and detect unusual operation cores in each cluster. The first core and second core execute the debug server at the first exception level and call the debug clients. The first core and second core execute the debug clients at a second exception level and output stack information of the unusual operation cores.

Abstract: A chip package structure is provided. The chip package structure includes a first chip structure including a substrate and an interconnect layer over the substrate. The chip package structure includes a second chip structure over the interconnect layer. The chip package structure includes a first conductive bump connected between the interconnect layer and the second chip structure. The chip package structure includes a conductive pillar over the interconnect layer, wherein a first thickness of the conductive pillar is substantially equal to a sum of a second thickness of the second chip structure and a third thickness of the first conductive bump. The chip package structure includes a molding layer over the interconnect layer and surrounding the second chip structure, the first conductive bump, and the conductive pillar. The chip package structure includes a second conductive bump over a first surface of the conductive pillar.

Abstract: A memory device for CIM, applicable to a 3D AND-type flash memory, includes a memory array, input word line pairs, and a signal processing circuit. The memory array includes first and second pairs of memory cells. Each first pair of memory cells includes a first memory cell set coupled to a first GBL and a second memory cell set coupled to a second GBL. Each second pair of memory cells includes a third memory cell set coupled to the first GBL and a fourth memory cell set coupled to the second GBL. Each input word line pair includes a first input word line coupled to the first and the second memory cell sets, and a second input word line coupled to the third and the fourth memory cell sets s. The signal processing circuit is coupled to the first and second global bit lines.

Abstract: Semiconductor device structures and methods for manufacturing the same are provided. The semiconductor device structure includes a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, a first transistor and a clamping device. The first nitride semiconductor layer is disposed on the substrate. The second nitride semiconductor layer is disposed on the first nitride semiconductor layer. The first transistor is disposed on the second nitride semiconductor layer. The first transistor includes a first control electrode, a first current electrode and a second current electrode. The clamping device is disposed on the second nitride semiconductor layer and electrically coupled with the first transistor. The clamping device includes a second transistor and a third transistor electrically coupled with the second transistor. The clamping device is electrically coupled with the first current electrode and the second current electrode of the first transistor.

Abstract: A display apparatus, including: a display panel; a supporting layer, provided on a backlight side of the display panel; a circuit board, provided on a side of the supporting layer away from the display panel; and a shielding layer, overlaid on a side of the circuit board away from the display panel and including a first insulation layer and a conductive layer. The conductive layer includes a shielding portion and a leading-out portion; the first insulation layer exposes at least partial region of the leading-out portion; an orthographic projection of the shielding portion on the display panel is located within an orthographic projection of the circuit board on the display panel; an orthographic projection of the leading-out portion on the display panel is located outside the orthographic projection of the circuit board on the display panel; the leading-out portion is electrically connected to the supporting layer.

Abstract: Disclosed are an easily maintainable assembly-type bridge expansion joint structure and a construction method thereof. The easily maintainable assembly-type bridge expansion joint structure, comprising: a to-be-connected bridge beam end, wherein a number of the to-be-connected bridge beam end is two, and a groove platform is provided on each of the two beam ends in an extending direction of a gap; a connecting box body, wherein a number of the connecting box body is two, each of the two connecting box bodies is fixedly arranged on the groove platform of the beam end, and a box chamber is provided on opposite side surfaces of the two connecting box bodies respectively, a plurality of box chambers are provided, which are open opposite each other, and the box chamber is provided in the extending direction of the gap; a side beam, wherein a number of the side beam is two.

Abstract: The invention discloses a stereo enhancement system and a stereo enhancement method. The stereo enhancement system includes a beamforming unit and a signal processing unit. The beamforming unit is used for receiving a plurality of input sound signals and generating a plurality of beamforming sound signals corresponding to a plurality of direction intervals respectively. The signal processing unit is coupled to the beamforming unit and used for receiving the plurality of beamforming sound signals corresponding to the plurality of direction intervals respectively and generating a first synthesized output sound signal and a second synthesized sound signal accordingly.

Abstract: A terminal device obtains first configuration information, where the first configuration information includes indication information of a UL MAC CE. Then, the terminal device preferentially sends a UL MAC PDU or an SL MAC PDU based on the indication information, where the UL MAC PDU can be used to transmit the UL MAC CE.

Abstract: A nano-FET and a method of forming is provided. In some embodiments, a nano-FET includes an epitaxial source/drain region contacting ends of a first nanostructure and a second nanostructure. The epitaxial source/drain region may include a first semiconductor material layer of a first semiconductor material, such that the first semiconductor material layer includes a first segment contacting the first nanostructure and a second segment contacting the second nanostructure, wherein the first segment is separated from the second segment. A second semiconductor material layer is formed over the first segment and the second segment. The second semiconductor material layer may include a second semiconductor material having a higher concentration of dopants of a first conductivity type than the first semiconductor material layer. The second semiconductor material layer may have a lower concentration percentage of silicon than the first semiconductor material layer.

Abstract: Embodiments of the present disclosure disclose a Cupriavidus metallidurans CML2, wherein the Cupriavidus metallidurans CML2 is deposited in the China Center for Type Culture Collection with a depository number CCTCC NO: M20231365, and a 16s rDNA of the Cupriavidus metallidurans CML2 has a nucleotide sequence of SEQ ID No. 1.

Abstract: Provided is a display panel, including a driver backplane, a light-emitting functional layer, and a light-extraction layer. The light-emitting functional layer and the light-extraction layer are successively stacked on a bearing surface of the driver backplane. The light-emitting functional layer includes a plurality of light-emitting units arranged in arrays. The light-extraction layer includes a first sub-layer and a second sub-layer, which are successively stacked on the light-emitting functional layer. A refractive index of the first sub-layer is less than a refractive index of the second sub-layer. A plurality of grooves are defined in the first sub-layer, and each of the plurality of grooves is opposite to one of the plurality of light-emitting units. A portion of the second sub-layer is within the plurality of grooves. A boundary length of the groove is greater than a boundary length of a light-emitting region of the corresponding one of the light-emitting units.

Abstract: Methods and systems are described for authenticating calls. An example method may comprise receiving a message indicative of a call request. Header data associated with the message may be analyzed to determine an attestation value. A signature may be generated based on the attestation value. A signed message comprising the signature and at least a portion of the message may be sent.

Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. These systems and methods can use a neural network based predictor, that has been trained to determine a temperature rise across an entire IC. The training of the predictor can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC), each template associated with location parameters to position the template in the IC; performing thermal simulations for each respective template of the IC, each thermal simulation determining an output based on a power pattern of tiles of the respective template, the output indicating a change in temperature of a center tile of the respective template relative to a base temperature of the integrated circuit; and training a neural network.

Abstract: An application-level memory control group of a first application may be created when the first application is opened. An anonymous page of the first application is added to a least recently used linked list of the application-level memory control group, and a file page of the first application is added to a global least recently used linked list. An application-level memory control group is created in a dimension of an application, and an anonymous page of the application is managed in a refined manner. In addition, a file page of the application-level memory control group may be managed based on a global least recently used linked list.