Patents by Inventor Chang-Li TAN

Chang-Li TAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11362464
    Abstract: A contact arrangement, including multiple contacts, is provided. The contacts are staggered. Some of the contacts form at least one contact group. The at least one contact group includes a pair of first contacts and eight second contacts. The pair of first contacts is a pair of differential signal contacts. The second contacts are arranged around the pair of first contacts. Two of the second contacts are arranged along a straight line perpendicular to a connecting line of the pair of first contacts. The position distribution and electrical properties of the other six of the second contacts are symmetrical to each other relative to the straight line.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: June 14, 2022
    Assignee: Shanghai Zhaoxin Semiconductor Co., Ltd.
    Inventors: Nai-Shung Chang, Yun-Han Chen, Hsiu-Wen Ho, Tsai-Sheng Chen, Chang-Li Tan, Chun-Yen Kang, Hsin-Kuan Wu
  • Patent number: 11316305
    Abstract: A contact arrangement, including multiple contacts, is provided. The contacts are staggered. Some of the contacts form at least one contact group. The at least one contact group includes a first contact and six second contacts. The second contacts are arranged around the first contact. When the first contact is a power contact or a ground contact, the second contacts are signal contacts. When the first contact is a signal contact, three of the second contacts are power contacts or ground contacts and are not adjacent to each other.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: April 26, 2022
    Assignee: Shanghai Zhaoxin Semiconductor Co., Ltd.
    Inventors: Nai-Shung Chang, Yun-Han Chen, Hsiu-Wen Ho, Tsai-Sheng Chen, Chang-Li Tan, Chun-Yen Kang, Hsin-Kuan Wu
  • Publication number: 20220052489
    Abstract: A contact arrangement, including multiple contacts, is provided. The contacts are staggered. Some of the contacts form at least one contact group. The at least one contact group includes a pair of first contacts and eight second contacts. The pair of first contacts is a pair of differential signal contacts. The second contacts are arranged around the pair of first contacts. Two of the second contacts are arranged along a straight line perpendicular to a connecting line of the pair of first contacts. The position distribution and electrical properties of the other six of the second contacts are symmetrical to each other relative to the straight line.
    Type: Application
    Filed: September 22, 2020
    Publication date: February 17, 2022
    Applicant: Shanghai Zhaoxin Semiconductor Co., Ltd.
    Inventors: Nai-Shung Chang, Yun-Han Chen, Hsiu-Wen Ho, Tsai-Sheng Chen, Chang-Li Tan, Chun-Yen Kang, Hsin-Kuan Wu
  • Publication number: 20220052488
    Abstract: A contact arrangement, including multiple contacts, is provided. The contacts are staggered. Some of the contacts form at least one contact group. The at least one contact group includes a first contact and six second contacts. The second contacts are arranged around the first contact. When the first contact is a power contact or a ground contact, the second contacts are signal contacts. When the first contact is a signal contact, three of the second contacts are power contacts or ground contacts and are not adjacent to each other.
    Type: Application
    Filed: September 22, 2020
    Publication date: February 17, 2022
    Applicant: Shanghai Zhaoxin Semiconductor Co., Ltd.
    Inventors: Nai-Shung Chang, Yun-Han Chen, Hsiu-Wen Ho, Tsai-Sheng Chen, Chang-Li Tan, Chun-Yen Kang, Hsin-Kuan Wu
  • Patent number: 10568199
    Abstract: A circuit substrate and a semiconductor package structure are provided. The circuit substrate includes a body and a via hole array. The via hole array includes via hole column units periodically arranged along a first direction. Each via hole column unit includes first to sixth via holes passing through the body and electrically connected to a capacitor. Any two adjacent via holes of the first to sixth via holes transmit power and ground signals. The sixth via hole of one of the via hole column units is adjacent to the first via hole of another one of the via hole column units, which is adjacent to the one of the via hole column units. The sixth via hole of one of the via hole column units and the first via hole of another one of the via hole column units transmit power and ground signals.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: February 18, 2020
    Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
    Inventors: Nai-Shung Chang, Tsai-Sheng Chen, Chang-Li Tan, Yun-Han Chen, Hsiu-Wen Ho
  • Patent number: 10568200
    Abstract: A circuit substrate and a semiconductor package structure are provided. The circuit substrate includes a body and a via hole array. The via hole array includes via hole column units periodically arranged along a first direction. Each via hole column unit includes first to sixth via holes passing through the body and electrically connected to a capacitor. Any two adjacent via holes of the first to sixth via holes transmit power and ground signals. The sixth via hole of one of the via hole column units is adjacent to the first via hole of another one of the via hole column units, which is adjacent to the one of the via hole column units. The sixth via hole of one of the via hole column units and the first via hole of another one of the via hole column units transmit power and ground signals.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: February 18, 2020
    Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
    Inventors: Nai-Shung Chang, Tsai-Sheng Chen, Chang-Li Tan, Yun-Han Chen, Hsiu-Wen Ho
  • Patent number: 10568198
    Abstract: A circuit substrate and a semiconductor package structure are provided. The circuit substrate includes a body and a via hole array. The via hole array includes via hole column units periodically arranged along a first direction. Each via hole column unit includes first to sixth via holes passing through the body and electrically connected to a capacitor. Any two adjacent via holes of the first to sixth via holes transmit power and ground signals. The sixth via hole of one of the via hole column units is adjacent to the first via hole of another one of the via hole column units, which is adjacent to the one of the via hole column units. The sixth via hole of one of the via hole column units and the first via hole of another one of the via hole column units transmit power and ground signals.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: February 18, 2020
    Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
    Inventors: Nai-Shung Chang, Tsai-Sheng Chen, Chang-Li Tan, Yun-Han Chen, Hsiu-Wen Ho
  • Publication number: 20180374790
    Abstract: A circuit substrate and a semiconductor package structure are provided. The circuit substrate includes a body and a via hole array. The via hole array includes via hole column units periodically arranged along a first direction. Each via hole column unit includes first to sixth via holes passing through the body and electrically connected to a capacitor. Any two adjacent via holes of the first to sixth via holes transmit power and ground signals. The sixth via hole of one of the via hole column units is adjacent to the first via hole of another one of the via hole column units, which is adjacent to the one of the via hole column units. The sixth via hole of one of the via hole column units and the first via hole of another one of the via hole column units transmit power and ground signals.
    Type: Application
    Filed: November 3, 2017
    Publication date: December 27, 2018
    Inventors: Nai-Shung CHANG, Tsai-Sheng CHEN, Chang-Li TAN, Yun-Han CHEN, Hsiu-Wen HO
  • Publication number: 20180374789
    Abstract: A circuit substrate and a semiconductor package structure are provided. The circuit substrate includes a body and a via hole array. The via hole array includes via hole column units periodically arranged along a first direction. Each via hole column unit includes first to sixth via holes passing through the body and electrically connected to a capacitor. Any two adjacent via holes of the first to sixth via holes transmit power and ground signals. The sixth via hole of one of the via hole column units is adjacent to the first via hole of another one of the via hole column units, which is adjacent to the one of the via hole column units. The sixth via hole of one of the via hole column units and the first via hole of another one of the via hole column units transmit power and ground signals.
    Type: Application
    Filed: November 3, 2017
    Publication date: December 27, 2018
    Inventors: Nai-Shung CHANG, Tsai-Sheng CHEN, Chang-Li TAN, Yun-Han CHEN, Hsiu-Wen HO
  • Publication number: 20180376582
    Abstract: A circuit substrate and a semiconductor package structure are provided. The circuit substrate includes a body and a via hole array. The via hole array includes via hole column units periodically arranged along a first direction. Each via hole column unit includes first to sixth via holes passing through the body and electrically connected to a capacitor. Any two adjacent via holes of the first to sixth via holes transmit power and ground signals. The sixth via hole of one of the via hole column units is adjacent to the first via hole of another one of the via hole column units, which is adjacent to the one of the via hole column units. The sixth via hole of one of the via hole column units and the first via hole of another one of the via hole column units transmit power and ground signals.
    Type: Application
    Filed: November 1, 2017
    Publication date: December 27, 2018
    Inventors: Nai-Shung CHANG, Tsai-Sheng CHEN, Chang-Li TAN, Yun-Han CHEN, Hsiu-Wen HO