Abstract: A mesa-oxide isolation method comprises steps of placing a wafer in a metalorganic chemical vapor deposition (MOCVD) system or a molecular beam epitaxy (MBE) system to grow an epitaxial layer on a surface of the wafer, spinning photo-resist on an upper surface of the epitaxial layer, exposing the wafer under a light to print electric circuit pattern on a masking and soaking the wafer in a developing solution to solve and remove the photosensitive resin, etching to remove a portion of the epitaxial layer, growing an oxide layer on the area of the epitaxial layer without photo-resist by soaking the wafer in a chemical solution, removing photo-resist to form a mesa on the upper surface of the wafer, and depositing metal connections on the mesa and the wafer.

Abstract: Disclosed in this invention is a new four-terminal type and multiple delta-doped transistors with multiple functions grown by low-pressure metalorganic chemical vapor deposition (LP-MOCVD). All the epilayers are grown on n.sup.+ -GaAs substrates. The real-space transfer transistors (RST), the collector is located under the substrate, reveal very strong negative differential resistance phenomena. The RST structure using an InGaAs channel manifests superior characteristics of a very high peak-to-valley current ratio up to 430,000 at room temperature, a peak current as high as 100 mA, very sharp charge injection, and a valley current as broad as 5.5V. Meanwhile, high performance heterostructure field effect transistors can be implemented on the same wafer by further evaporating a gate between source and drain electrodes. In order to significantly reduce leakage current, an ohmic recession is made at the source and drain.

Abstract: Disclosed in this invention is a new four-terminal type and multiple delta-doped transistors with multiple functions grown by low-pressure metalorganic chemical vapor deposition (LP-MOCVD). All the epilayers are grown on n.sup.+ -GaAs substrates. The real-space transfer transistors (RST), the collector is located under the substrate, reveal very strong negative differential resistance phenomena. The RST structure using an InGaAs channel manifests superior characteristics of a very high peak-to-valley current ratio up to 430,000 at room temperature, a peak current as high as 100 mA, very sharp charge injection, and a valley current as broad as 5.5V. Meanwhile, high performance heterostructure field effect transistors can be implemented on the same wafer by further evaporating a gate between source and drain electrodes. In order to significantly reduce leakage current, an ohmic recession is made at the source and drain.