Abstract: A semiconductor device includes a substrate. An active pattern is on the substrate and extends in a first horizontal direction. First to third nanosheets are sequentially stacked on the active pattern and are spaced apart from each other in a vertical direction. A gate electrode is on the active pattern and extends in a second horizontal direction. The gate electrode surrounds each of the first to third nanosheets. A source/drain region is on the active pattern on at least one side of the gate electrode. An interlayer insulating layer covers the source/drain region. A source/drain contact penetrates the interlayer insulating layer in the vertical direction and is connected to the source/drain region. At least a portion of the interlayer insulating layer is disposed between sidewalls of the source/drain contact and the source/drain region in the first horizontal direction and overlaps sidewalls of the third nanosheet along the first horizontal direction.

Abstract: A semiconductor device includes a first semiconductor pattern doped with first impurities on a substrate, a first channel pattern on the first semiconductor pattern, second semiconductor patterns doped with second impurities contacting upper edge surfaces, respectively, of the first channel pattern, and a first gate structure surrounding at least a portion of a sidewall of the first channel pattern.

Abstract: A semiconductor device includes a substrate having a first region and a second region; a first nanowire in the first region in a direction perpendicular to an upper surface of the substrate; a second nanowire in the second region in a direction perpendicular to the upper surface of the substrate and having a height less than that of the first nanowire; first source/drain regions at top portion and bottom portion of the first nanowire; second source/drain regions at top portion and bottom portion of the second nanowire; a first gate electrode surrounding the first nanowire between the first source/drain regions; and a second gate electrode surrounding the second nanowire between the second source/drain regions.

Abstract: A semiconductor device includes a substrate having a first region and a second region; a first nanowire in the first region in a direction perpendicular to an upper surface of the substrate; a second nanowire in the second region in a direction perpendicular to the upper surface of the substrate and having a height less than that of the first nanowire; first source/drain regions at top portion and bottom portion of the first nanowire; second source/drain regions at top portion and bottom portion of the second nanowire; a first gate electrode surrounding the first nanowire between the first source/drain regions; and a second gate electrode surrounding the second nanowire between the second source/drain regions.

Abstract: A semiconductor device includes a first semiconductor pattern doped with first impurities on a substrate, a first channel pattern on the first semiconductor pattern, second semiconductor patterns doped with second impurities contacting upper edge surfaces, respectively, of the first channel pattern, and a first gate structure surrounding at least a portion of a sidewall of the first channel pattern.