Patents by Inventor Chang-mo JEONG

Chang-mo JEONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240125908
    Abstract: A method for manufacturing a LiDAR device is proposed. The method may include providing a LiDAR module including a laser emitting module and a laser detecting module to a target region. The method may also include adjusting, on the basis of first detecting data obtained from the laser detecting module, a relative position of a detecting optic module with respect to the laser detecting module. The method may further include adjusting, on the basis of image data obtained from at least one image sensor, a relative position of an emitting optic module with respect to the laser emitting module.
    Type: Application
    Filed: December 21, 2023
    Publication date: April 18, 2024
    Inventors: Chan M LIM, Dong Kyu KIM, Chang Mo JEONG, Hoon Il JEONG, Eunsung KWON, Junhyun JO, Bumsik WON, Suwoo NOH, Sang Shin BAE, Seong Min YUN, Jong Hyun YIM
  • Publication number: 20210288472
    Abstract: A vertical cavity surface emitting laser (VCSEL) array, comprising: a first sub-array includes a plurality of VCSEL units arranged along a first axis, and wherein the first sub-array includes: a first VCSEL unit includes a first upper contact and a first bottom contact; and a second VCSEL unit includes a second upper contact and a second bottom contact; a first contact electrically connected to the first upper contact and the second bottom contact; and a second contact electrically connected to the second upper contact and the first bottom contact, wherein the first VCSEL unit is operated when a first voltage is applied to the first contact and a second voltage smaller than the first voltage is applied to the second contact, and wherein the second VCSEL unit is operated when the second voltage is applied to the first contact and the first voltage is applied to the second contact.
    Type: Application
    Filed: May 28, 2021
    Publication date: September 16, 2021
    Inventors: Jun Hwan JANG, Hee Sun YOON, Chan M LIM, Hoon Il JEONG, Chang Mo JEONG, Jai Hi CHO
  • Patent number: 11063408
    Abstract: A vertical cavity surface emitting laser (VCSEL) array, comprising: a first sub-array includes a plurality of VCSEL units arranged along a first axis, and wherein the first sub-array includes: a first VCSEL unit includes a first upper contact and a first bottom contact; and a second VCSEL unit includes a second upper contact and a second bottom contact; a first contact electrically connected to the first upper contact and the second bottom contact; and a second contact electrically connected to the second upper contact and the first bottom contact, wherein the first VCSEL unit is operated when a first voltage is applied to the first contact and a second voltage smaller than the first voltage is applied to the second contact, and wherein the second VCSEL unit is operated when the second voltage is applied to the first contact and the first voltage is applied to the second contact.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: July 13, 2021
    Assignee: SOS Lab Co., Ltd.
    Inventors: Jun Hwan Jang, Hee Sun Yoon, Chan M Lim, Hoon Il Jeong, Chang Mo Jeong, Jai Hi Cho
  • Publication number: 20210190822
    Abstract: A three-layer micro electro mechanical system (MEMS) spring pin includes a lower-layer spring pin in which a lower-layer wave is disposed between and connected to a lower-layer top plunger and a lower-layer bottom plunger, an upper-layer spring pin in which an upper-layer wave is disposed between and connected to an upper-layer top plunger and an upper-layer bottom plunger, a middle-layer top tip interposed between the upper-layer top plunger and the lower-layer top plunger, and a middle-layer bottom tip interposed between the upper-layer bottom plunger and the lower-layer bottom plunger. According to the above-described structure, effects are expected in which bending is prevented, a stroke is stabilized due to the multi-layer spring, and contact characteristics are enhanced due to the multi-layer plunger.
    Type: Application
    Filed: March 5, 2021
    Publication date: June 24, 2021
    Inventors: Jin Kook JUN, Sang Hoon CHA, Chang Mo JEONG
  • Publication number: 20210066893
    Abstract: A vertical cavity surface emitting laser (VCSEL) array, comprising: a first sub-array includes a plurality of VCSEL units arranged along a first axis, and wherein the first sub-array includes: a first VCSEL unit includes a first upper contact and a first bottom contact; and a second VCSEL unit includes a second upper contact and a second bottom contact; a first contact electrically connected to the first upper contact and the second bottom contact; and a second contact electrically connected to the second upper contact and the first bottom contact, wherein the first VCSEL unit is operated when a first voltage is applied to the first contact and a second voltage smaller than the first voltage is applied to the second contact, and wherein the second VCSEL unit is operated when the second voltage is applied to the first contact and the first voltage is applied to the second contact.
    Type: Application
    Filed: August 28, 2020
    Publication date: March 4, 2021
    Inventors: Jun Hwan JANG, Hee Sun YOON, Chan M LIM, Hoon Il JEONG, Chang Mo JEONG, Jai Hi CHO
  • Patent number: 9520377
    Abstract: Semiconductor device packages and methods of manufacturing the semiconductor device packages are provided. A semiconductor device package may include a bonding layer between a substrate and a semiconductor chip, and the bonding layer may include an intermetallic compound. The intermetallic compound may be a compound of metal and solder material. The intermetallic compound may include Ag3Sn. A method of manufacturing the semiconductor device package may include forming a bonding layer, which bonds a semiconductor chip to a substrate, by using a mixed paste including metal particles and a solder material. The bonding layer may be formed by forming an intermetallic compound, which is formed by heating the mixed paste to react the metal particles with the solder material.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: December 13, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-Won Yoon, Baik-woo Lee, Seong-woon Booh, Chang-mo Jeong
  • Publication number: 20150115452
    Abstract: Semiconductor device packages and methods of manufacturing the semiconductor device packages are provided. A semiconductor device package may include a bonding layer between a substrate and a semiconductor chip, and the bonding layer may include an intermetallic compound. The intermetallic compound may be a compound of metal and solder material. The intermetallic compound may include Ag3Sn. A method of manufacturing the semiconductor device package may include forming a bonding layer, which bonds a semiconductor chip to a substrate, by using a mixed paste including metal particles and a solder material. The bonding layer may be formed by forming an intermetallic compound, which is formed by heating the mixed paste to react the metal particles with the solder material.
    Type: Application
    Filed: June 23, 2014
    Publication date: April 30, 2015
    Inventors: Jeong-Won YOON, Baik-woo LEE, Seong-woon BOOH, Chang-mo JEONG
  • Patent number: 8963325
    Abstract: According to example embodiments of inventive concepts, a power device includes a semiconductor structure having a first surface facing a second surface, an upper electrode, and a lower electrode. The upper electrode may include a first contact layer that is on the first surface of the semiconductor structure, and a first bonding pad layer that is on the first contact layer and is formed of a metal containing nickel (Ni). The lower electrode may include a second contact layer that is under the second surface of the semiconductor structure, and a second bonding pad layer that is under the second contact layer and is formed of a metal containing Ni.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: February 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Baik-woo Lee, Young-hun Byun, Seong-woon Booh, Chang-mo Jeong
  • Publication number: 20140021620
    Abstract: According to example embodiments of inventive concepts, a power device includes a semiconductor structure having a first surface facing a second surface, an upper electrode, and a lower electrode. The upper electrode may include a first contact layer that is on the first surface of the semiconductor structure, and a first bonding pad layer that is on the first contact layer and is formed of a metal containing nickel (Ni). The lower electrode may include a second contact layer that is under the second surface of the semiconductor structure, and a second bonding pad layer that is under the second contact layer and is formed of a metal containing Ni.
    Type: Application
    Filed: January 11, 2013
    Publication date: January 23, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Baik-woo LEE, Young-hun BYUN, Seong-woon BOOH, Chang-mo JEONG