Patents by Inventor Chang Moon Lim
Chang Moon Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220283488Abstract: An Extreme UltraViolet (EUV) mask includes: a reflective layer over a substrate; a capping layer including a porous hydrogen trapping layer over the reflective layer; and an absorption layer over the capping layer.Type: ApplicationFiled: August 30, 2021Publication date: September 8, 2022Inventors: Suk Won PARK, Chan Ha PARK, Sang Ho LEE, Chang Moon LIM, Tae Kwon JEE
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Patent number: 9612524Abstract: A reflective mask includes a first reflection layer disposed on a mask substrate, a first capping layer disposed on the first reflection layer, a second reflection pattern disposed on a portion of the first capping layer, and a phase shifter disposed between the second reflection pattern and the first capping layer to cause a phase difference between a first light reflecting from the first reflection layer and a second light reflecting from the second reflection pattern. Related methods are also provided.Type: GrantFiled: June 10, 2015Date of Patent: April 4, 2017Assignee: SK Hynix Inc.Inventors: In Hwan Lee, Sun Young Koo, Seo Min Kim, Yong Dae Kim, Jin Soo Kim, Byung Hoon Lee, Mi Jeong Lim, Chang Moon Lim, Tae Joong Ha, Yoon Suk Hyun
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Publication number: 20160209741Abstract: A reflective mask includes a first reflection layer disposed on a mask substrate, a first capping layer disposed on the first reflection layer, a second reflection pattern disposed on a portion of the first capping layer, and a phase shifter disposed between the second reflection pattern and the first capping layer to cause a phase difference between a first light reflecting from the first reflection layer and a second light reflecting from the second reflection pattern. Related methods are also provided.Type: ApplicationFiled: June 10, 2015Publication date: July 21, 2016Inventors: In Hwan LEE, Sun Young KOO, Seo Min KIM, Yong Dae KIM, Jin Soo KIM, Byung Hoon LEE, Mi Jeong LIM, Chang Moon LIM, Tae Joong HA, Yoon Suk HYUN
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Publication number: 20150311211Abstract: In a semiconductor device and a method for manufacturing the same, a pillar pattern is formed in an alternating pattern and a one side contact (OSC) is formed without using a tilted ion implantation process or a mask, resulting in formation of a vertical gate. The semiconductor device includes an alternating or zigzag-type pillar pattern formed over a semiconductor substrate, a first hole formed between pillars of the pillar pattern, a passivation layer formed over a sidewall of the first hole, a second hole formed by partially etching a lower part of the first hole, a bit line formed in the second hole, and a contact formed at a lower part of the pillar pattern.Type: ApplicationFiled: July 8, 2015Publication date: October 29, 2015Inventors: Byoung Hoon LEE, Chang Moon LIM
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Patent number: 9105655Abstract: In a semiconductor device and a method for manufacturing the same, a pillar pattern is formed in an alternating pattern and a one side contact (OSC) is formed without using a tilted ion implantation process or a mask, resulting in formation of a vertical gate. The semiconductor device includes an alternating or zigzag-type pillar pattern formed over a semiconductor substrate, a first hole formed between pillars of the pillar pattern, a passivation layer formed over a sidewall of the first hole, a second hole formed by partially etching a lower part of the first hole, a bit line formed in the second hole, and a contact formed at a lower part of the pillar pattern.Type: GrantFiled: December 10, 2012Date of Patent: August 11, 2015Assignee: SK HYNIX INC.Inventors: Byoung Hoon Lee, Chang Moon Lim
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Patent number: 8906584Abstract: A semiconductor device includes a cell mask pattern disposed in a cell region of a mask substrate and a vernier mask pattern disposed in a vernier region of the mask substrate. The vernier mask pattern includes a variable mask pattern portion to transfer a different shape of pattern depending on the magnitude of exposure energy.Type: GrantFiled: March 18, 2013Date of Patent: December 9, 2014Assignee: SK Hynix Inc.Inventors: Byoung Hoon Lee, Chang Moon Lim, Myoung Soo Kim, Jeong Su Park, Jun Taek Park, In Hwan Lee
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Patent number: 8841219Abstract: Lithography processes are provided. The lithography process includes installing a reticle masking (REMA) part having a REMA open region in a lithography apparatus, loading a reticle including at least one reticle chip region in which circuit patterns are disposed into the lithography apparatus, and sequentially exposing a first wafer field, which includes a first chip region corresponding to the reticle chip region, and a second wafer field, which includes a second chip region corresponding to the reticle chip region, of a wafer to rays using the reticle and the REMA part to transfer images of the circuit patterns onto the wafer. An edge boundary of the REMA open region transferred on the first wafer field is located on a scribe lane region between the first and second chip regions while the first wafer field is exposed. Methods of manufacturing a semiconductor device using the lithography process are also provided.Type: GrantFiled: September 14, 2012Date of Patent: September 23, 2014Assignee: SK Hynix Inc.Inventors: Jun Taek Park, Chang Moon Lim, Seok Kyun Kim
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Publication number: 20140065524Abstract: A semiconductor device includes a cell mask pattern disposed in a cell region of a mask substrate and a vernier mask pattern disposed in a vernier region of the mask substrate. The vernier mask pattern includes a variable mask pattern portion to transfer a different shape of pattern depending on the magnitude of exposure energy.Type: ApplicationFiled: March 18, 2013Publication date: March 6, 2014Applicant: SK HYNIX INC.Inventors: Byoung Hoon LEE, Chang Moon LIM, Myoung Soo KIM, Jeong Su PARK, Jun Taek PARK, In Hwan LEE
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Publication number: 20130210234Abstract: Lithography processes are provided. The lithography process includes installing a reticle masking (REMA) part having a REMA open region in a lithography apparatus, loading a reticle including at least one reticle chip region in which circuit patterns are disposed into the lithography apparatus, and sequentially exposing a first wafer field, which includes a first chip region corresponding to the reticle chip region, and a second wafer field, which includes a second chip region corresponding to the reticle chip region, of a wafer to rays using the reticle and the REMA part to transfer images of the circuit patterns onto the wafer. An edge boundary of the REMA open region transferred on the first wafer field is located on a scribe lane region between the first and second chip regions while the first wafer field is exposed. Methods of manufacturing a semiconductor device using the lithography process are also provided.Type: ApplicationFiled: September 14, 2012Publication date: August 15, 2013Applicant: SK HYNIX INC.Inventors: Jun Taek PARK, Chang Moon LIM, Seok Kyun KIM
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Patent number: 7915113Abstract: A method for manufacturing a semiconductor device including a vertical cell transistor structure may include forming a vertical cell transistor structure over a semiconductor substrate of a cell region; forming an insulating film over the vertical cell transistor structure; planarizing the insulating film to expose a hard mask film disposed at a top portion of the vertical cell transistor structure; and forming a storage node contact by removing the hard mask film.Type: GrantFiled: October 14, 2008Date of Patent: March 29, 2011Assignee: Hynix Semiconductor Inc.Inventors: Jin Soo Kim, Chang Moon Lim
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Patent number: 7838201Abstract: A polymer for immersion lithography comprising a repeating unit represented by Formula 1 and a photoresist composition containing the same. A photoresist film formed by the photoresist composition of the invention is highly resistant to dissolution, a photoacid generator in an aqueous solution for immersion lithography, thereby preventing contamination of an exposure lens and deformation of the photoresist pattern by exposure.Type: GrantFiled: April 8, 2009Date of Patent: November 23, 2010Assignee: Hynix Semiconductor Inc.Inventors: Jae Chang Jung, Cheol Kyu Bok, Chang Moon Lim, Seung Chan Moon
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Patent number: 7629595Abstract: A method for forming a fine photoresist pattern of a semiconductor device, the method comprising the steps of forming a chemically amplified photoresist film over an underlying layer formed over a semiconductor substrate to form a first photoresist pattern; exposing the first photoresist pattern without exposure mask to bake the resulting structure; and flowing the photoresist of the first photoresist pattern to obtain a second photoresist pattern.Type: GrantFiled: December 12, 2006Date of Patent: December 8, 2009Assignee: Hynix Semiconductor Inc.Inventors: Jae Chang Jung, Chang Moon Lim
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Patent number: 7571424Abstract: A lithography method has a simulation method for mathematically approximating a photoresist film pattern with a Diffused Aerial Image Model (“DAIM”) for semiconductor device fabrication. The DAIM is applied with at least two acids having heterogeneous diffusion characteristics.Type: GrantFiled: November 3, 2006Date of Patent: August 4, 2009Assignee: Hynix Semiconductor Inc.Inventors: Chang Moon Lim, Jun Taek Park
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Publication number: 20090191709Abstract: A polymer for immersion lithography comprising a repeating unit represented by Formula 1 and a photoresist composition containing the same. A photoresist film formed by the photoresist composition of the invention is highly resistant to dissolution, a photoacid generator in an aqueous solution for immersion lithography, thereby preventing contamination of an exposure lens and deformation of the photoresist pattern by exposure.Type: ApplicationFiled: April 8, 2009Publication date: July 30, 2009Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Jae Chang Jung, Cheol Kyu Bok, Chang Moon Lim, Seung Chan Moon
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Patent number: 7553771Abstract: A method of forming a pattern of a semiconductor device comprises forming a first hard mask film, a first resist film, and a second hard mask film over an underlying layer of a semiconductor substrate; forming a second resist pattern over the second hard mask film; etching the second hard mask film using the second resist pattern as an etching mask to form a second hard mask pattern; performing an ion-implanting process on the first resist film with the second hard mask pattern as an ion implanting mask to form an ion implanting layer in a portion of the first resist film, and selectively etching the first resist film with the second hard mask pattern and an ion implanting layer as an etching mask to form a first resist pattern.Type: GrantFiled: November 29, 2007Date of Patent: June 30, 2009Assignee: Hynix Semiconductor Inc.Inventors: Seo Min Kim, Chang Moon Lim
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Patent number: 7534548Abstract: A polymer for immersion lithography comprising a repeating unit represented by Formula 1 and a photoresist composition containing the same. A photoresist film formed by the photoresist composition of the invention is highly resistant to dissolution, a photoacid generator in an aqueous solution for immersion lithography, thereby preventing contamination of an exposure lens and deformation of the photoresist pattern by exposure.Type: GrantFiled: December 15, 2005Date of Patent: May 19, 2009Assignee: Hynix Semiconductor Inc.Inventors: Jae Chang Jung, Cheol Kyu Bok, Chang Moon Lim, Seung Chan Moon
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Publication number: 20090101970Abstract: A method for manufacturing a semiconductor device including a vertical cell transistor structure may include forming a vertical cell transistor structure over a semiconductor substrate of a cell region; forming an insulating film over the vertical cell transistor structure; planarizing the insulating film to expose a hard mask film disposed at a top portion of the vertical cell transistor structure; and forming a storage node contact by removing the hard mask film.Type: ApplicationFiled: October 14, 2008Publication date: April 23, 2009Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Jin Soo Kim, Chang Moon Lim
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Patent number: 7462439Abstract: Disclosed herein is a top anti-reflective coating polymer represented by Formula 1, below: wherein R1 and R2 are independently hydrogen, fluoro, methyl or fluoromethyl; R3 is a C1-10 hydrocarbon or a C1-10 hydrocarbon in which the hydrogen atoms are partly replaced by fluorine atoms; and a, b and c, representing the mole fraction of each monomer, are in the range between 0.05 and 0.9. Because a top anti-reflective coating formed using the anti-reflective coating polymer of Formula 1 is not soluble in water, it can be applied to immersion lithography using water as a medium for a light source. In addition, because the top anti-reflective coating can reduce the reflectance from an underlying layer, the uniformity of CD is improved, thus enabling the formation of an ultra fine pattern.Type: GrantFiled: June 23, 2005Date of Patent: December 9, 2008Assignee: Hynix Semiconductor Inc.Inventors: Jae Chang Jung, Cheol Kyu Bok, Chang Moon Lim, Seung Chan Moon
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Publication number: 20080286954Abstract: A method of forming a pattern of a semiconductor device comprises forming a first hard mask film, a first resist film, and a second hard mask film over an underlying layer of a semiconductor substrate; forming a second resist pattern over the second hard mask film; etching the second hard mask film using the second resist pattern as an etching mask to form a second hard mask pattern; performing an ion-implanting process on the first resist film with the second hard mask pattern as an ion implanting mask to form an ion implanting layer in a portion of the first resist film, and selectively etching the first resist film with the second hard mask pattern and an ion implanting layer as an etching mask to form a first resist pattern.Type: ApplicationFiled: November 29, 2007Publication date: November 20, 2008Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Seo Min Kim, Chang Moon Lim
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Patent number: 7419760Abstract: Disclosed herein is a top anti-reflective coating composition comprising a bissulfone compound, as a photoacid generator, represented by Formula 1 below: wherein R1 and R2 are independently, a straight, branched or cyclic alkyl, aryl, alkenyl, oxoalkyl or oxoaryl group of 1 to 20 carbon atoms; or a halogen-substituted straight, branched or cyclic alkyl, aryl, alkenyl, oxoalkyl or oxoaryl group of 1 to 20 carbon atoms. Since the top anti-reflective coating composition dissolves a portion of a photoacid generator present at the top of an underlying photosensitizer, particularly, upon formation of a top anti-reflective coating, it can prevent the top from being formed into a thick section. Therefore, the use of the anti-reflective coating composition enables the formation of a vertical pattern of a semiconductor device.Type: GrantFiled: June 22, 2005Date of Patent: September 2, 2008Assignee: Hynix Semiconductor Inc.Inventors: Jae Chang Jung, Cheol Kyu Bok, Sam Young Kim, Chang Moon Lim, Seung Chan Moon