Patents by Inventor Chang Moon Lim

Chang Moon Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220283488
    Abstract: An Extreme UltraViolet (EUV) mask includes: a reflective layer over a substrate; a capping layer including a porous hydrogen trapping layer over the reflective layer; and an absorption layer over the capping layer.
    Type: Application
    Filed: August 30, 2021
    Publication date: September 8, 2022
    Inventors: Suk Won PARK, Chan Ha PARK, Sang Ho LEE, Chang Moon LIM, Tae Kwon JEE
  • Patent number: 9612524
    Abstract: A reflective mask includes a first reflection layer disposed on a mask substrate, a first capping layer disposed on the first reflection layer, a second reflection pattern disposed on a portion of the first capping layer, and a phase shifter disposed between the second reflection pattern and the first capping layer to cause a phase difference between a first light reflecting from the first reflection layer and a second light reflecting from the second reflection pattern. Related methods are also provided.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: April 4, 2017
    Assignee: SK Hynix Inc.
    Inventors: In Hwan Lee, Sun Young Koo, Seo Min Kim, Yong Dae Kim, Jin Soo Kim, Byung Hoon Lee, Mi Jeong Lim, Chang Moon Lim, Tae Joong Ha, Yoon Suk Hyun
  • Publication number: 20160209741
    Abstract: A reflective mask includes a first reflection layer disposed on a mask substrate, a first capping layer disposed on the first reflection layer, a second reflection pattern disposed on a portion of the first capping layer, and a phase shifter disposed between the second reflection pattern and the first capping layer to cause a phase difference between a first light reflecting from the first reflection layer and a second light reflecting from the second reflection pattern. Related methods are also provided.
    Type: Application
    Filed: June 10, 2015
    Publication date: July 21, 2016
    Inventors: In Hwan LEE, Sun Young KOO, Seo Min KIM, Yong Dae KIM, Jin Soo KIM, Byung Hoon LEE, Mi Jeong LIM, Chang Moon LIM, Tae Joong HA, Yoon Suk HYUN
  • Publication number: 20150311211
    Abstract: In a semiconductor device and a method for manufacturing the same, a pillar pattern is formed in an alternating pattern and a one side contact (OSC) is formed without using a tilted ion implantation process or a mask, resulting in formation of a vertical gate. The semiconductor device includes an alternating or zigzag-type pillar pattern formed over a semiconductor substrate, a first hole formed between pillars of the pillar pattern, a passivation layer formed over a sidewall of the first hole, a second hole formed by partially etching a lower part of the first hole, a bit line formed in the second hole, and a contact formed at a lower part of the pillar pattern.
    Type: Application
    Filed: July 8, 2015
    Publication date: October 29, 2015
    Inventors: Byoung Hoon LEE, Chang Moon LIM
  • Patent number: 9105655
    Abstract: In a semiconductor device and a method for manufacturing the same, a pillar pattern is formed in an alternating pattern and a one side contact (OSC) is formed without using a tilted ion implantation process or a mask, resulting in formation of a vertical gate. The semiconductor device includes an alternating or zigzag-type pillar pattern formed over a semiconductor substrate, a first hole formed between pillars of the pillar pattern, a passivation layer formed over a sidewall of the first hole, a second hole formed by partially etching a lower part of the first hole, a bit line formed in the second hole, and a contact formed at a lower part of the pillar pattern.
    Type: Grant
    Filed: December 10, 2012
    Date of Patent: August 11, 2015
    Assignee: SK HYNIX INC.
    Inventors: Byoung Hoon Lee, Chang Moon Lim
  • Patent number: 8906584
    Abstract: A semiconductor device includes a cell mask pattern disposed in a cell region of a mask substrate and a vernier mask pattern disposed in a vernier region of the mask substrate. The vernier mask pattern includes a variable mask pattern portion to transfer a different shape of pattern depending on the magnitude of exposure energy.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: December 9, 2014
    Assignee: SK Hynix Inc.
    Inventors: Byoung Hoon Lee, Chang Moon Lim, Myoung Soo Kim, Jeong Su Park, Jun Taek Park, In Hwan Lee
  • Patent number: 8841219
    Abstract: Lithography processes are provided. The lithography process includes installing a reticle masking (REMA) part having a REMA open region in a lithography apparatus, loading a reticle including at least one reticle chip region in which circuit patterns are disposed into the lithography apparatus, and sequentially exposing a first wafer field, which includes a first chip region corresponding to the reticle chip region, and a second wafer field, which includes a second chip region corresponding to the reticle chip region, of a wafer to rays using the reticle and the REMA part to transfer images of the circuit patterns onto the wafer. An edge boundary of the REMA open region transferred on the first wafer field is located on a scribe lane region between the first and second chip regions while the first wafer field is exposed. Methods of manufacturing a semiconductor device using the lithography process are also provided.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: September 23, 2014
    Assignee: SK Hynix Inc.
    Inventors: Jun Taek Park, Chang Moon Lim, Seok Kyun Kim
  • Publication number: 20140065524
    Abstract: A semiconductor device includes a cell mask pattern disposed in a cell region of a mask substrate and a vernier mask pattern disposed in a vernier region of the mask substrate. The vernier mask pattern includes a variable mask pattern portion to transfer a different shape of pattern depending on the magnitude of exposure energy.
    Type: Application
    Filed: March 18, 2013
    Publication date: March 6, 2014
    Applicant: SK HYNIX INC.
    Inventors: Byoung Hoon LEE, Chang Moon LIM, Myoung Soo KIM, Jeong Su PARK, Jun Taek PARK, In Hwan LEE
  • Publication number: 20130210234
    Abstract: Lithography processes are provided. The lithography process includes installing a reticle masking (REMA) part having a REMA open region in a lithography apparatus, loading a reticle including at least one reticle chip region in which circuit patterns are disposed into the lithography apparatus, and sequentially exposing a first wafer field, which includes a first chip region corresponding to the reticle chip region, and a second wafer field, which includes a second chip region corresponding to the reticle chip region, of a wafer to rays using the reticle and the REMA part to transfer images of the circuit patterns onto the wafer. An edge boundary of the REMA open region transferred on the first wafer field is located on a scribe lane region between the first and second chip regions while the first wafer field is exposed. Methods of manufacturing a semiconductor device using the lithography process are also provided.
    Type: Application
    Filed: September 14, 2012
    Publication date: August 15, 2013
    Applicant: SK HYNIX INC.
    Inventors: Jun Taek PARK, Chang Moon LIM, Seok Kyun KIM
  • Patent number: 7915113
    Abstract: A method for manufacturing a semiconductor device including a vertical cell transistor structure may include forming a vertical cell transistor structure over a semiconductor substrate of a cell region; forming an insulating film over the vertical cell transistor structure; planarizing the insulating film to expose a hard mask film disposed at a top portion of the vertical cell transistor structure; and forming a storage node contact by removing the hard mask film.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: March 29, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jin Soo Kim, Chang Moon Lim
  • Patent number: 7838201
    Abstract: A polymer for immersion lithography comprising a repeating unit represented by Formula 1 and a photoresist composition containing the same. A photoresist film formed by the photoresist composition of the invention is highly resistant to dissolution, a photoacid generator in an aqueous solution for immersion lithography, thereby preventing contamination of an exposure lens and deformation of the photoresist pattern by exposure.
    Type: Grant
    Filed: April 8, 2009
    Date of Patent: November 23, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jae Chang Jung, Cheol Kyu Bok, Chang Moon Lim, Seung Chan Moon
  • Patent number: 7629595
    Abstract: A method for forming a fine photoresist pattern of a semiconductor device, the method comprising the steps of forming a chemically amplified photoresist film over an underlying layer formed over a semiconductor substrate to form a first photoresist pattern; exposing the first photoresist pattern without exposure mask to bake the resulting structure; and flowing the photoresist of the first photoresist pattern to obtain a second photoresist pattern.
    Type: Grant
    Filed: December 12, 2006
    Date of Patent: December 8, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jae Chang Jung, Chang Moon Lim
  • Patent number: 7571424
    Abstract: A lithography method has a simulation method for mathematically approximating a photoresist film pattern with a Diffused Aerial Image Model (“DAIM”) for semiconductor device fabrication. The DAIM is applied with at least two acids having heterogeneous diffusion characteristics.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: August 4, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Chang Moon Lim, Jun Taek Park
  • Publication number: 20090191709
    Abstract: A polymer for immersion lithography comprising a repeating unit represented by Formula 1 and a photoresist composition containing the same. A photoresist film formed by the photoresist composition of the invention is highly resistant to dissolution, a photoacid generator in an aqueous solution for immersion lithography, thereby preventing contamination of an exposure lens and deformation of the photoresist pattern by exposure.
    Type: Application
    Filed: April 8, 2009
    Publication date: July 30, 2009
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Jae Chang Jung, Cheol Kyu Bok, Chang Moon Lim, Seung Chan Moon
  • Patent number: 7553771
    Abstract: A method of forming a pattern of a semiconductor device comprises forming a first hard mask film, a first resist film, and a second hard mask film over an underlying layer of a semiconductor substrate; forming a second resist pattern over the second hard mask film; etching the second hard mask film using the second resist pattern as an etching mask to form a second hard mask pattern; performing an ion-implanting process on the first resist film with the second hard mask pattern as an ion implanting mask to form an ion implanting layer in a portion of the first resist film, and selectively etching the first resist film with the second hard mask pattern and an ion implanting layer as an etching mask to form a first resist pattern.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: June 30, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Seo Min Kim, Chang Moon Lim
  • Patent number: 7534548
    Abstract: A polymer for immersion lithography comprising a repeating unit represented by Formula 1 and a photoresist composition containing the same. A photoresist film formed by the photoresist composition of the invention is highly resistant to dissolution, a photoacid generator in an aqueous solution for immersion lithography, thereby preventing contamination of an exposure lens and deformation of the photoresist pattern by exposure.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: May 19, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jae Chang Jung, Cheol Kyu Bok, Chang Moon Lim, Seung Chan Moon
  • Publication number: 20090101970
    Abstract: A method for manufacturing a semiconductor device including a vertical cell transistor structure may include forming a vertical cell transistor structure over a semiconductor substrate of a cell region; forming an insulating film over the vertical cell transistor structure; planarizing the insulating film to expose a hard mask film disposed at a top portion of the vertical cell transistor structure; and forming a storage node contact by removing the hard mask film.
    Type: Application
    Filed: October 14, 2008
    Publication date: April 23, 2009
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Jin Soo Kim, Chang Moon Lim
  • Patent number: 7462439
    Abstract: Disclosed herein is a top anti-reflective coating polymer represented by Formula 1, below: wherein R1 and R2 are independently hydrogen, fluoro, methyl or fluoromethyl; R3 is a C1-10 hydrocarbon or a C1-10 hydrocarbon in which the hydrogen atoms are partly replaced by fluorine atoms; and a, b and c, representing the mole fraction of each monomer, are in the range between 0.05 and 0.9. Because a top anti-reflective coating formed using the anti-reflective coating polymer of Formula 1 is not soluble in water, it can be applied to immersion lithography using water as a medium for a light source. In addition, because the top anti-reflective coating can reduce the reflectance from an underlying layer, the uniformity of CD is improved, thus enabling the formation of an ultra fine pattern.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: December 9, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jae Chang Jung, Cheol Kyu Bok, Chang Moon Lim, Seung Chan Moon
  • Publication number: 20080286954
    Abstract: A method of forming a pattern of a semiconductor device comprises forming a first hard mask film, a first resist film, and a second hard mask film over an underlying layer of a semiconductor substrate; forming a second resist pattern over the second hard mask film; etching the second hard mask film using the second resist pattern as an etching mask to form a second hard mask pattern; performing an ion-implanting process on the first resist film with the second hard mask pattern as an ion implanting mask to form an ion implanting layer in a portion of the first resist film, and selectively etching the first resist film with the second hard mask pattern and an ion implanting layer as an etching mask to form a first resist pattern.
    Type: Application
    Filed: November 29, 2007
    Publication date: November 20, 2008
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Seo Min Kim, Chang Moon Lim
  • Patent number: 7419760
    Abstract: Disclosed herein is a top anti-reflective coating composition comprising a bissulfone compound, as a photoacid generator, represented by Formula 1 below: wherein R1 and R2 are independently, a straight, branched or cyclic alkyl, aryl, alkenyl, oxoalkyl or oxoaryl group of 1 to 20 carbon atoms; or a halogen-substituted straight, branched or cyclic alkyl, aryl, alkenyl, oxoalkyl or oxoaryl group of 1 to 20 carbon atoms. Since the top anti-reflective coating composition dissolves a portion of a photoacid generator present at the top of an underlying photosensitizer, particularly, upon formation of a top anti-reflective coating, it can prevent the top from being formed into a thick section. Therefore, the use of the anti-reflective coating composition enables the formation of a vertical pattern of a semiconductor device.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: September 2, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jae Chang Jung, Cheol Kyu Bok, Sam Young Kim, Chang Moon Lim, Seung Chan Moon