Abstract: The present application discloses a CMOS image sensor. A pixel cell circuit comprises a photodiode and a CMOS pixel readout circuit. The pixel cell circuit is formed on an SOI substrate, and the photodiode is formed on a bottom semiconductor substrate. The CMOS pixel readout circuit is formed on a top semiconductor substrate. A photo-induced carrier of the photodiode is connected to the CMOS pixel readout circuit by means of an electrotransfer structure passing through a dielectric buried layer. The present application also discloses a method for manufacturing a CMOS image sensor. The present application can increase a pixel cell density without reducing a photodiode area, thus achieving an ultra-high CMOS image sensor density and improving the device quality.

Abstract: The present application discloses a double-layer stacked CMOS image sensor, photo diode and transfer gate transistor of a pixel cell are formed on the first substrate sequentially along a longitudinal direction, and the other pixel transistors of the pixel cell are formed on the second substrate. The first substrate and the second substrate are packaged separately, and the second substrate is stacked on the top side of the first substrate instead of being in juxtaposition. Since the photo diode and the pixel transistors other than the transfer gate transistor of the pixel cell are located on two separate substrates respectively, the area of a photo diode region may be increased significantly, thereby greatly increasing full well capacitance of the image sensor and increasing a dynamic range, and reduce a dark current and image noise significantly, thereby improving the dark line noise and full well capacitance simultaneously.

Abstract: A system includes an inductance, a sensing circuit, a filter circuit, and a switch. The inductance includes a first terminal connected to (i) an output of a power supply supplying a DC voltage and (ii) a load, and a second terminal connected to a node. The sensing circuit is configured to sense voltage at the node. The filter circuit is configured to filter the voltage at the node, and output a filtered voltage. The switch is configured to communicate with the node, and control current through the load based on the filtered voltage.

Abstract: Power converters having bleeder circuits are disclosed. For example, in an embodiment, a power converter can include a controllable TRIAC in series with a rectifier that together produces a controllable rectified voltage at a first node, a first inductor having a first end and a second end, the first inductor being electrically connected to the first node at the first end, and electrically connected to a first power lead of a transistor and an anode of a diode at the second end, a load capacitor having a first end and a second end, the load capacitor being electrically coupled to the first node at the first end of the load capacitor, and electrically coupled to a cathode of the diode at the second end the load capacitor, control circuitry to control switching of the transistor, and a bleeder circuit coupled to the second end of the inductor, the bleeder circuit including a resistor in series with a coupling capacitor.

Abstract: A controller, which may be a controller for solid-state lighting, includes a transformer, and a control circuit having a bias voltage input. The control circuit activates when voltage applied to the bias voltage input reaches a threshold. The transformer has a feedback output to the bias voltage input. The controller also has a bias voltage circuit including a resonant circuit providing a resonant current, and a bias capacitor charged by the resonant current, applying start-up bias voltage to the bias voltage input. The controller further has a cutoff to shut down the resonant current when the transformer feedback output is above the threshold. A method of operating the a controller includes providing a resonant current to charge a start-up bias capacitor. The method also includes automatically cutting off the resonant current when the transformer feedback output is above the threshold. This may be determined by monitoring the bias voltage input.